| Message ID | 20230817003029.3073210-6-rananta@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU | expand |
Hi Raghavendra,
kernel test robot noticed the following build errors:
[auto build test ERROR on 2ccdd1b13c591d306f0401d98dedc4bdcd02b421]
url: https://github.com/intel-lab-lkp/linux/commits/Raghavendra-Rao-Ananta/KVM-arm64-PMU-Introduce-a-helper-to-set-the-guest-s-PMU/20230817-083353
base: 2ccdd1b13c591d306f0401d98dedc4bdcd02b421
patch link: https://lore.kernel.org/r/20230817003029.3073210-6-rananta%40google.com
patch subject: [PATCH v5 05/12] KVM: arm64: PMU: Simplify extracting PMCR_EL0.N
config: arm-randconfig-r046-20230817 (https://download.01.org/0day-ci/archive/20230817/202308171444.Q5rfJubF-lkp@intel.com/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4a5ac14ee968ff0ad5d2cc1ffa0299048db4c88a)
reproduce: (https://download.01.org/0day-ci/archive/20230817/202308171444.Q5rfJubF-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202308171444.Q5rfJubF-lkp@intel.com/
All errors (new ones prefixed by >>):
| ^~~~~~
drivers/perf/arm_pmuv3.c:141:2: note: previous initialization is here
141 | PERF_CACHE_MAP_ALL_UNSUPPORTED,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:45:31: note: expanded from macro 'PERF_CACHE_MAP_ALL_UNSUPPORTED'
45 | [0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \
| ^~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:37:31: note: expanded from macro 'CACHE_OP_UNSUPPORTED'
37 | #define CACHE_OP_UNSUPPORTED 0xFFFF
| ^~~~~~
drivers/perf/arm_pmuv3.c:148:44: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
148 | [C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmuv3.h:133:44: note: expanded from macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD'
133 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD 0x004E
| ^~~~~~
drivers/perf/arm_pmuv3.c:141:2: note: previous initialization is here
141 | PERF_CACHE_MAP_ALL_UNSUPPORTED,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:45:31: note: expanded from macro 'PERF_CACHE_MAP_ALL_UNSUPPORTED'
45 | [0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \
| ^~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:37:31: note: expanded from macro 'CACHE_OP_UNSUPPORTED'
37 | #define CACHE_OP_UNSUPPORTED 0xFFFF
| ^~~~~~
drivers/perf/arm_pmuv3.c:149:45: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
149 | [C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmuv3.h:134:44: note: expanded from macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR'
134 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR 0x004F
| ^~~~~~
drivers/perf/arm_pmuv3.c:141:2: note: previous initialization is here
141 | PERF_CACHE_MAP_ALL_UNSUPPORTED,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:45:31: note: expanded from macro 'PERF_CACHE_MAP_ALL_UNSUPPORTED'
45 | [0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \
| ^~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:37:31: note: expanded from macro 'CACHE_OP_UNSUPPORTED'
37 | #define CACHE_OP_UNSUPPORTED 0xFFFF
| ^~~~~~
drivers/perf/arm_pmuv3.c:150:42: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
150 | [C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmuv3.h:131:50: note: expanded from macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD'
131 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD 0x004C
| ^~~~~~
drivers/perf/arm_pmuv3.c:141:2: note: previous initialization is here
141 | PERF_CACHE_MAP_ALL_UNSUPPORTED,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:45:31: note: expanded from macro 'PERF_CACHE_MAP_ALL_UNSUPPORTED'
45 | [0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \
| ^~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:37:31: note: expanded from macro 'CACHE_OP_UNSUPPORTED'
37 | #define CACHE_OP_UNSUPPORTED 0xFFFF
| ^~~~~~
drivers/perf/arm_pmuv3.c:151:43: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
151 | [C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmuv3.h:132:50: note: expanded from macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR'
132 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR 0x004D
| ^~~~~~
drivers/perf/arm_pmuv3.c:141:2: note: previous initialization is here
141 | PERF_CACHE_MAP_ALL_UNSUPPORTED,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:45:31: note: expanded from macro 'PERF_CACHE_MAP_ALL_UNSUPPORTED'
45 | [0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \
| ^~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:37:31: note: expanded from macro 'CACHE_OP_UNSUPPORTED'
37 | #define CACHE_OP_UNSUPPORTED 0xFFFF
| ^~~~~~
drivers/perf/arm_pmuv3.c:153:44: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
153 | [C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmuv3.h:148:46: note: expanded from macro 'ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD'
148 | #define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD 0x0060
| ^~~~~~
drivers/perf/arm_pmuv3.c:141:2: note: previous initialization is here
141 | PERF_CACHE_MAP_ALL_UNSUPPORTED,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:45:31: note: expanded from macro 'PERF_CACHE_MAP_ALL_UNSUPPORTED'
45 | [0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \
| ^~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:37:31: note: expanded from macro 'CACHE_OP_UNSUPPORTED'
37 | #define CACHE_OP_UNSUPPORTED 0xFFFF
| ^~~~~~
drivers/perf/arm_pmuv3.c:154:45: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
154 | [C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmuv3.h:149:46: note: expanded from macro 'ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR'
149 | #define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR 0x0061
| ^~~~~~
drivers/perf/arm_pmuv3.c:141:2: note: previous initialization is here
141 | PERF_CACHE_MAP_ALL_UNSUPPORTED,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:45:31: note: expanded from macro 'PERF_CACHE_MAP_ALL_UNSUPPORTED'
45 | [0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \
| ^~~~~~~~~~~~~~~~~~~~
include/linux/perf/arm_pmu.h:37:31: note: expanded from macro 'CACHE_OP_UNSUPPORTED'
37 | #define CACHE_OP_UNSUPPORTED 0xFFFF
| ^~~~~~
>> drivers/perf/arm_pmuv3.c:1131:24: error: call to undeclared function 'FIELD_GET'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
1131 | cpu_pmu->num_events = FIELD_GET(ARMV8_PMU_PMCR_N, armv8pmu_pmcr_read());
| ^
55 warnings and 1 error generated.
vim +/FIELD_GET +1131 drivers/perf/arm_pmuv3.c
1114
1115 static void __armv8pmu_probe_pmu(void *info)
1116 {
1117 struct armv8pmu_probe_info *probe = info;
1118 struct arm_pmu *cpu_pmu = probe->pmu;
1119 u64 pmceid_raw[2];
1120 u32 pmceid[2];
1121 int pmuver;
1122
1123 pmuver = read_pmuver();
1124 if (!pmuv3_implemented(pmuver))
1125 return;
1126
1127 cpu_pmu->pmuver = pmuver;
1128 probe->present = true;
1129
1130 /* Read the nb of CNTx counters supported from PMNC */
> 1131 cpu_pmu->num_events = FIELD_GET(ARMV8_PMU_PMCR_N, armv8pmu_pmcr_read());
1132
1133 /* Add the CPU cycles counter */
1134 cpu_pmu->num_events += 1;
1135
1136 pmceid[0] = pmceid_raw[0] = read_pmceid0();
1137 pmceid[1] = pmceid_raw[1] = read_pmceid1();
1138
1139 bitmap_from_arr32(cpu_pmu->pmceid_bitmap,
1140 pmceid, ARMV8_PMUV3_MAX_COMMON_EVENTS);
1141
1142 pmceid[0] = pmceid_raw[0] >> 32;
1143 pmceid[1] = pmceid_raw[1] >> 32;
1144
1145 bitmap_from_arr32(cpu_pmu->pmceid_ext_bitmap,
1146 pmceid, ARMV8_PMUV3_MAX_COMMON_EVENTS);
1147
1148 /* store PMMIR register for sysfs */
1149 if (is_pmuv3p4(pmuver) && (pmceid_raw[1] & BIT(31)))
1150 cpu_pmu->reg_pmmir = read_pmmir();
1151 else
1152 cpu_pmu->reg_pmmir = 0;
1153 }
1154
+cc will, rutland Hi Raghu, Please make sure you cc the right folks for changes that poke multiple subsystems. The diff looks OK, but I'm somewhat dubious of the need for this change in the context of what you're trying to accomplish for KVM. I'd prefer we either leave the existing definition/usage intact or rework *all* of the PMUv3 masks to be of the shifted variety. On Thu, Aug 17, 2023 at 12:30:22AM +0000, Raghavendra Rao Ananta wrote: > From: Reiji Watanabe <reijiw@google.com> > > Some code extracts PMCR_EL0.N using ARMV8_PMU_PMCR_N_SHIFT and > ARMV8_PMU_PMCR_N_MASK. Define ARMV8_PMU_PMCR_N (0x1f << 11), > and simplify those codes using FIELD_GET() and/or ARMV8_PMU_PMCR_N. > The following patches will also use these macros to extract PMCR_EL0.N. Changelog is a bit wordy: Define a shifted mask for accessing PMCR_EL0.N amenable to the use of bitfield accessors and convert the existing, open-coded mask shifts to the new definition. > No functional change intended. > > Signed-off-by: Reiji Watanabe <reijiw@google.com> > Signed-off-by: Raghavendra Rao Ananta <rananta@google.com> > --- > arch/arm64/kvm/pmu-emul.c | 3 +-- > arch/arm64/kvm/sys_regs.c | 7 +++---- > drivers/perf/arm_pmuv3.c | 3 +-- > include/linux/perf/arm_pmuv3.h | 2 +- > 4 files changed, 6 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c > index b87822024828a..f7b5fa16341ad 100644 > --- a/arch/arm64/kvm/pmu-emul.c > +++ b/arch/arm64/kvm/pmu-emul.c > @@ -245,9 +245,8 @@ void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) > > u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu) > { > - u64 val = __vcpu_sys_reg(vcpu, PMCR_EL0) >> ARMV8_PMU_PMCR_N_SHIFT; > + u64 val = FIELD_GET(ARMV8_PMU_PMCR_N, __vcpu_sys_reg(vcpu, PMCR_EL0)); > > - val &= ARMV8_PMU_PMCR_N_MASK; > if (val == 0) > return BIT(ARMV8_PMU_CYCLE_IDX); > else > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 39e9248c935e7..30108f09e088b 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -750,7 +750,7 @@ static u64 reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) > return 0; > > /* Only preserve PMCR_EL0.N, and reset the rest to 0 */ > - pmcr = read_sysreg(pmcr_el0) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT); > + pmcr = read_sysreg(pmcr_el0) & ARMV8_PMU_PMCR_N; > if (!kvm_supports_32bit_el0()) > pmcr |= ARMV8_PMU_PMCR_LC; > > @@ -858,10 +858,9 @@ static bool access_pmceid(struct kvm_vcpu *vcpu, struct sys_reg_params *p, > > static bool pmu_counter_idx_valid(struct kvm_vcpu *vcpu, u64 idx) > { > - u64 pmcr, val; > + u64 val; > > - pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0); > - val = (pmcr >> ARMV8_PMU_PMCR_N_SHIFT) & ARMV8_PMU_PMCR_N_MASK; > + val = FIELD_GET(ARMV8_PMU_PMCR_N, __vcpu_sys_reg(vcpu, PMCR_EL0)); > if (idx >= val && idx != ARMV8_PMU_CYCLE_IDX) { > kvm_inject_undefined(vcpu); > return false; > diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c > index 08b3a1bf0ef62..7618b0adc0b8c 100644 > --- a/drivers/perf/arm_pmuv3.c > +++ b/drivers/perf/arm_pmuv3.c > @@ -1128,8 +1128,7 @@ static void __armv8pmu_probe_pmu(void *info) > probe->present = true; > > /* Read the nb of CNTx counters supported from PMNC */ > - cpu_pmu->num_events = (armv8pmu_pmcr_read() >> ARMV8_PMU_PMCR_N_SHIFT) > - & ARMV8_PMU_PMCR_N_MASK; > + cpu_pmu->num_events = FIELD_GET(ARMV8_PMU_PMCR_N, armv8pmu_pmcr_read()); > > /* Add the CPU cycles counter */ > cpu_pmu->num_events += 1; > diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h > index e3899bd77f5cc..ecbcf3f93560c 100644 > --- a/include/linux/perf/arm_pmuv3.h > +++ b/include/linux/perf/arm_pmuv3.h > @@ -216,7 +216,7 @@ > #define ARMV8_PMU_PMCR_LC (1 << 6) /* Overflow on 64 bit cycle counter */ > #define ARMV8_PMU_PMCR_LP (1 << 7) /* Long event counter enable */ > #define ARMV8_PMU_PMCR_N_SHIFT 11 /* Number of counters supported */ > -#define ARMV8_PMU_PMCR_N_MASK 0x1f > +#define ARMV8_PMU_PMCR_N (0x1f << ARMV8_PMU_PMCR_N_SHIFT) > #define ARMV8_PMU_PMCR_MASK 0xff /* Mask for writable bits */ > > /* > -- > 2.41.0.694.ge786442a9b-goog > >
Hi Oliver, On Fri, Sep 15, 2023 at 12:56 PM Oliver Upton <oliver.upton@linux.dev> wrote: > > +cc will, rutland > > Hi Raghu, > > Please make sure you cc the right folks for changes that poke multiple > subsystems. > > The diff looks OK, but I'm somewhat dubious of the need for this change > in the context of what you're trying to accomplish for KVM. I'd prefer > we either leave the existing definition/usage intact or rework *all* of > the PMUv3 masks to be of the shifted variety. > I believe the original intention was to make accessing the PMCR.N field simple. However, if you feel its redundant and is unnecessary for this series I'm happy to drop the patch. Thank you. Raghavendra > On Thu, Aug 17, 2023 at 12:30:22AM +0000, Raghavendra Rao Ananta wrote: > > From: Reiji Watanabe <reijiw@google.com> > > > > Some code extracts PMCR_EL0.N using ARMV8_PMU_PMCR_N_SHIFT and > > ARMV8_PMU_PMCR_N_MASK. Define ARMV8_PMU_PMCR_N (0x1f << 11), > > and simplify those codes using FIELD_GET() and/or ARMV8_PMU_PMCR_N. > > The following patches will also use these macros to extract PMCR_EL0.N. > > Changelog is a bit wordy: > > Define a shifted mask for accessing PMCR_EL0.N amenable to the use of > bitfield accessors and convert the existing, open-coded mask shifts to > the new definition. > > > No functional change intended. > > > > Signed-off-by: Reiji Watanabe <reijiw@google.com> > > Signed-off-by: Raghavendra Rao Ananta <rananta@google.com> > > --- > > arch/arm64/kvm/pmu-emul.c | 3 +-- > > arch/arm64/kvm/sys_regs.c | 7 +++---- > > drivers/perf/arm_pmuv3.c | 3 +-- > > include/linux/perf/arm_pmuv3.h | 2 +- > > 4 files changed, 6 insertions(+), 9 deletions(-) > > > > diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c > > index b87822024828a..f7b5fa16341ad 100644 > > --- a/arch/arm64/kvm/pmu-emul.c > > +++ b/arch/arm64/kvm/pmu-emul.c > > @@ -245,9 +245,8 @@ void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) > > > > u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu) > > { > > - u64 val = __vcpu_sys_reg(vcpu, PMCR_EL0) >> ARMV8_PMU_PMCR_N_SHIFT; > > + u64 val = FIELD_GET(ARMV8_PMU_PMCR_N, __vcpu_sys_reg(vcpu, PMCR_EL0)); > > > > - val &= ARMV8_PMU_PMCR_N_MASK; > > if (val == 0) > > return BIT(ARMV8_PMU_CYCLE_IDX); > > else > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > > index 39e9248c935e7..30108f09e088b 100644 > > --- a/arch/arm64/kvm/sys_regs.c > > +++ b/arch/arm64/kvm/sys_regs.c > > @@ -750,7 +750,7 @@ static u64 reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) > > return 0; > > > > /* Only preserve PMCR_EL0.N, and reset the rest to 0 */ > > - pmcr = read_sysreg(pmcr_el0) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT); > > + pmcr = read_sysreg(pmcr_el0) & ARMV8_PMU_PMCR_N; > > if (!kvm_supports_32bit_el0()) > > pmcr |= ARMV8_PMU_PMCR_LC; > > > > @@ -858,10 +858,9 @@ static bool access_pmceid(struct kvm_vcpu *vcpu, struct sys_reg_params *p, > > > > static bool pmu_counter_idx_valid(struct kvm_vcpu *vcpu, u64 idx) > > { > > - u64 pmcr, val; > > + u64 val; > > > > - pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0); > > - val = (pmcr >> ARMV8_PMU_PMCR_N_SHIFT) & ARMV8_PMU_PMCR_N_MASK; > > + val = FIELD_GET(ARMV8_PMU_PMCR_N, __vcpu_sys_reg(vcpu, PMCR_EL0)); > > if (idx >= val && idx != ARMV8_PMU_CYCLE_IDX) { > > kvm_inject_undefined(vcpu); > > return false; > > diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c > > index 08b3a1bf0ef62..7618b0adc0b8c 100644 > > --- a/drivers/perf/arm_pmuv3.c > > +++ b/drivers/perf/arm_pmuv3.c > > @@ -1128,8 +1128,7 @@ static void __armv8pmu_probe_pmu(void *info) > > probe->present = true; > > > > /* Read the nb of CNTx counters supported from PMNC */ > > - cpu_pmu->num_events = (armv8pmu_pmcr_read() >> ARMV8_PMU_PMCR_N_SHIFT) > > - & ARMV8_PMU_PMCR_N_MASK; > > + cpu_pmu->num_events = FIELD_GET(ARMV8_PMU_PMCR_N, armv8pmu_pmcr_read()); > > > > /* Add the CPU cycles counter */ > > cpu_pmu->num_events += 1; > > diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h > > index e3899bd77f5cc..ecbcf3f93560c 100644 > > --- a/include/linux/perf/arm_pmuv3.h > > +++ b/include/linux/perf/arm_pmuv3.h > > @@ -216,7 +216,7 @@ > > #define ARMV8_PMU_PMCR_LC (1 << 6) /* Overflow on 64 bit cycle counter */ > > #define ARMV8_PMU_PMCR_LP (1 << 7) /* Long event counter enable */ > > #define ARMV8_PMU_PMCR_N_SHIFT 11 /* Number of counters supported */ > > -#define ARMV8_PMU_PMCR_N_MASK 0x1f > > +#define ARMV8_PMU_PMCR_N (0x1f << ARMV8_PMU_PMCR_N_SHIFT) > > #define ARMV8_PMU_PMCR_MASK 0xff /* Mask for writable bits */ > > > > /* > > -- > > 2.41.0.694.ge786442a9b-goog > > > > > > -- > Thanks, > Oliver
diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c index b87822024828a..f7b5fa16341ad 100644 --- a/arch/arm64/kvm/pmu-emul.c +++ b/arch/arm64/kvm/pmu-emul.c @@ -245,9 +245,8 @@ void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu) { - u64 val = __vcpu_sys_reg(vcpu, PMCR_EL0) >> ARMV8_PMU_PMCR_N_SHIFT; + u64 val = FIELD_GET(ARMV8_PMU_PMCR_N, __vcpu_sys_reg(vcpu, PMCR_EL0)); - val &= ARMV8_PMU_PMCR_N_MASK; if (val == 0) return BIT(ARMV8_PMU_CYCLE_IDX); else diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 39e9248c935e7..30108f09e088b 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -750,7 +750,7 @@ static u64 reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) return 0; /* Only preserve PMCR_EL0.N, and reset the rest to 0 */ - pmcr = read_sysreg(pmcr_el0) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT); + pmcr = read_sysreg(pmcr_el0) & ARMV8_PMU_PMCR_N; if (!kvm_supports_32bit_el0()) pmcr |= ARMV8_PMU_PMCR_LC; @@ -858,10 +858,9 @@ static bool access_pmceid(struct kvm_vcpu *vcpu, struct sys_reg_params *p, static bool pmu_counter_idx_valid(struct kvm_vcpu *vcpu, u64 idx) { - u64 pmcr, val; + u64 val; - pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0); - val = (pmcr >> ARMV8_PMU_PMCR_N_SHIFT) & ARMV8_PMU_PMCR_N_MASK; + val = FIELD_GET(ARMV8_PMU_PMCR_N, __vcpu_sys_reg(vcpu, PMCR_EL0)); if (idx >= val && idx != ARMV8_PMU_CYCLE_IDX) { kvm_inject_undefined(vcpu); return false; diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c index 08b3a1bf0ef62..7618b0adc0b8c 100644 --- a/drivers/perf/arm_pmuv3.c +++ b/drivers/perf/arm_pmuv3.c @@ -1128,8 +1128,7 @@ static void __armv8pmu_probe_pmu(void *info) probe->present = true; /* Read the nb of CNTx counters supported from PMNC */ - cpu_pmu->num_events = (armv8pmu_pmcr_read() >> ARMV8_PMU_PMCR_N_SHIFT) - & ARMV8_PMU_PMCR_N_MASK; + cpu_pmu->num_events = FIELD_GET(ARMV8_PMU_PMCR_N, armv8pmu_pmcr_read()); /* Add the CPU cycles counter */ cpu_pmu->num_events += 1; diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h index e3899bd77f5cc..ecbcf3f93560c 100644 --- a/include/linux/perf/arm_pmuv3.h +++ b/include/linux/perf/arm_pmuv3.h @@ -216,7 +216,7 @@ #define ARMV8_PMU_PMCR_LC (1 << 6) /* Overflow on 64 bit cycle counter */ #define ARMV8_PMU_PMCR_LP (1 << 7) /* Long event counter enable */ #define ARMV8_PMU_PMCR_N_SHIFT 11 /* Number of counters supported */ -#define ARMV8_PMU_PMCR_N_MASK 0x1f +#define ARMV8_PMU_PMCR_N (0x1f << ARMV8_PMU_PMCR_N_SHIFT) #define ARMV8_PMU_PMCR_MASK 0xff /* Mask for writable bits */ /*