| Message ID | 20230901072809.640175-8-xiong.y.zhang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Upgrade vPMU version to 5 | expand |
On 1/9/2023 3:28 pm, Xiong Zhang wrote: > With Arch PMU v5, CPUID.0AH.ECX is a bit mask which enumerates the > supported Fixed Counters. If bit 'i' is set, it implies that Fixed > Counter 'i' is supported. > > This commit adds CPUID.0AH.ECX emulation for vPMU version 5, KVM > supports Fixed Counter enumeration starting from 0 by default, > user can modify it through SET_CPUID2 ioctl. > > Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> > --- > arch/x86/kvm/cpuid.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 95dc5e8847e0..2bffed010c9e 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -1028,7 +1028,10 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) > > entry->eax = eax.full; > entry->ebx = kvm_pmu_cap.events_mask; > - entry->ecx = 0; > + if (kvm_pmu_cap.version < 5) > + entry->ecx = 0; > + else > + entry->ecx = (1ULL << kvm_pmu_cap.num_counters_fixed) - 1; If there are partial fixed counters on the host (e.g. L1 host for L2 VM) that are filtered out, L1 KVM should not expose unsupported fixed counters in this way. > entry->edx = edx.full; > break; > }
> On 1/9/2023 3:28 pm, Xiong Zhang wrote: > > With Arch PMU v5, CPUID.0AH.ECX is a bit mask which enumerates the > > supported Fixed Counters. If bit 'i' is set, it implies that Fixed > > Counter 'i' is supported. > > > > This commit adds CPUID.0AH.ECX emulation for vPMU version 5, KVM > > supports Fixed Counter enumeration starting from 0 by default, user > > can modify it through SET_CPUID2 ioctl. > > > > Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> > > --- > > arch/x86/kvm/cpuid.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index > > 95dc5e8847e0..2bffed010c9e 100644 > > --- a/arch/x86/kvm/cpuid.c > > +++ b/arch/x86/kvm/cpuid.c > > @@ -1028,7 +1028,10 @@ static inline int __do_cpuid_func(struct > > kvm_cpuid_array *array, u32 function) > > > > entry->eax = eax.full; > > entry->ebx = kvm_pmu_cap.events_mask; > > - entry->ecx = 0; > > + if (kvm_pmu_cap.version < 5) > > + entry->ecx = 0; > > + else > > + entry->ecx = (1ULL << > kvm_pmu_cap.num_counters_fixed) - 1; > > If there are partial fixed counters on the host (e.g. L1 host for L2 VM) that are > filtered out, > L1 KVM should not expose unsupported fixed counters in this way. If vPMC index doesn't exist on host, for basic counter, this doesn't matter as KVM still get host counter for it. for pebs, this will disable guest pebs. Is this right? Any other reasons ? So here we'd better get entry->ecx from host, so that guest and host will have the same fixed counter bitmap, this means we will extend perf_get_x86_pmu_capability(&kvm_pmu_cap). > > > entry->edx = edx.full; > > break; > > }
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 95dc5e8847e0..2bffed010c9e 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -1028,7 +1028,10 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) entry->eax = eax.full; entry->ebx = kvm_pmu_cap.events_mask; - entry->ecx = 0; + if (kvm_pmu_cap.version < 5) + entry->ecx = 0; + else + entry->ecx = (1ULL << kvm_pmu_cap.num_counters_fixed) - 1; entry->edx = edx.full; break; }
With Arch PMU v5, CPUID.0AH.ECX is a bit mask which enumerates the supported Fixed Counters. If bit 'i' is set, it implies that Fixed Counter 'i' is supported. This commit adds CPUID.0AH.ECX emulation for vPMU version 5, KVM supports Fixed Counter enumeration starting from 0 by default, user can modify it through SET_CPUID2 ioctl. Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> --- arch/x86/kvm/cpuid.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)