| Message ID | 20230901072809.640175-9-xiong.y.zhang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Upgrade vPMU version to 5 | expand |
On 1/9/2023 3:28 pm, Xiong Zhang wrote: > Modern intel processors have supported Architectural Performance > Monitoring Version 5, this commit upgrade Intel vcpu's vPMU > version from 2 to 5. > > Go through PMU features from version 3 to 5, the following > features are not supported: > 1. AnyThread counting: it is added in v3, and deprecated in v5. > 2. Streamed Freeze_PerfMon_On_PMI in v4, since legacy Freeze_PerMon_ON_PMI > isn't supported, the new one won't be supported neither. > 3. IA32_PERF_GLOBAL_STATUS.ASCI[bit 60]: Related to SGX, and will be > emulated by SGX developer later. > 4. Domain Separation in v5. When INV flag in IA32_PERFEVTSELx is used, a > counter stops counting when logical processor exits the C0 ACPI C-state. > First guest INV flag isn't supported, second guest ACPI C-state is vague. > > When a guest enable unsupported features through WRMSR, KVM will inject > a #GP into the guest. > > Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> > --- > arch/x86/kvm/pmu.h | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h > index 4bab4819ea6c..8e6bc9b1a747 100644 > --- a/arch/x86/kvm/pmu.h > +++ b/arch/x86/kvm/pmu.h > @@ -215,7 +215,10 @@ static inline void kvm_init_pmu_capability(const struct kvm_pmu_ops *pmu_ops) > return; > } > > - kvm_pmu_cap.version = min(kvm_pmu_cap.version, 2); For AMD as of now, the kvm_pmu_cap.version will not exceed 2. Thus there's no need to differentiate between Intel and AMD. > + if (is_intel) > + kvm_pmu_cap.version = min(kvm_pmu_cap.version, 5); > + else > + kvm_pmu_cap.version = min(kvm_pmu_cap.version, 2); > kvm_pmu_cap.num_counters_gp = min(kvm_pmu_cap.num_counters_gp, > pmu_ops->MAX_NR_GP_COUNTERS); > kvm_pmu_cap.num_counters_fixed = min(kvm_pmu_cap.num_counters_fixed,
> On 1/9/2023 3:28 pm, Xiong Zhang wrote: > > Modern intel processors have supported Architectural Performance > > Monitoring Version 5, this commit upgrade Intel vcpu's vPMU version > > from 2 to 5. > > > > Go through PMU features from version 3 to 5, the following features > > are not supported: > > 1. AnyThread counting: it is added in v3, and deprecated in v5. > > 2. Streamed Freeze_PerfMon_On_PMI in v4, since legacy > > Freeze_PerMon_ON_PMI isn't supported, the new one won't be supported > neither. > > 3. IA32_PERF_GLOBAL_STATUS.ASCI[bit 60]: Related to SGX, and will be > > emulated by SGX developer later. > > 4. Domain Separation in v5. When INV flag in IA32_PERFEVTSELx is used, > > a counter stops counting when logical processor exits the C0 ACPI C-state. > > First guest INV flag isn't supported, second guest ACPI C-state is vague. > > > > When a guest enable unsupported features through WRMSR, KVM will > > inject a #GP into the guest. > > > > Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> > > --- > > arch/x86/kvm/pmu.h | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h index > > 4bab4819ea6c..8e6bc9b1a747 100644 > > --- a/arch/x86/kvm/pmu.h > > +++ b/arch/x86/kvm/pmu.h > > @@ -215,7 +215,10 @@ static inline void kvm_init_pmu_capability(const > struct kvm_pmu_ops *pmu_ops) > > return; > > } > > > > - kvm_pmu_cap.version = min(kvm_pmu_cap.version, 2); > > For AMD as of now, the kvm_pmu_cap.version will not exceed 2. > Thus there's no need to differentiate between Intel and AMD. > Get it. thanks > > + if (is_intel) > > + kvm_pmu_cap.version = min(kvm_pmu_cap.version, 5); > > + else > > + kvm_pmu_cap.version = min(kvm_pmu_cap.version, 2); > > kvm_pmu_cap.num_counters_gp = > min(kvm_pmu_cap.num_counters_gp, > > pmu_ops->MAX_NR_GP_COUNTERS); > > kvm_pmu_cap.num_counters_fixed = > > min(kvm_pmu_cap.num_counters_fixed,
diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h index 4bab4819ea6c..8e6bc9b1a747 100644 --- a/arch/x86/kvm/pmu.h +++ b/arch/x86/kvm/pmu.h @@ -215,7 +215,10 @@ static inline void kvm_init_pmu_capability(const struct kvm_pmu_ops *pmu_ops) return; } - kvm_pmu_cap.version = min(kvm_pmu_cap.version, 2); + if (is_intel) + kvm_pmu_cap.version = min(kvm_pmu_cap.version, 5); + else + kvm_pmu_cap.version = min(kvm_pmu_cap.version, 2); kvm_pmu_cap.num_counters_gp = min(kvm_pmu_cap.num_counters_gp, pmu_ops->MAX_NR_GP_COUNTERS); kvm_pmu_cap.num_counters_fixed = min(kvm_pmu_cap.num_counters_fixed,
Modern intel processors have supported Architectural Performance Monitoring Version 5, this commit upgrade Intel vcpu's vPMU version from 2 to 5. Go through PMU features from version 3 to 5, the following features are not supported: 1. AnyThread counting: it is added in v3, and deprecated in v5. 2. Streamed Freeze_PerfMon_On_PMI in v4, since legacy Freeze_PerMon_ON_PMI isn't supported, the new one won't be supported neither. 3. IA32_PERF_GLOBAL_STATUS.ASCI[bit 60]: Related to SGX, and will be emulated by SGX developer later. 4. Domain Separation in v5. When INV flag in IA32_PERFEVTSELx is used, a counter stops counting when logical processor exits the C0 ACPI C-state. First guest INV flag isn't supported, second guest ACPI C-state is vague. When a guest enable unsupported features through WRMSR, KVM will inject a #GP into the guest. Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> --- arch/x86/kvm/pmu.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)