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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id i8-20020a0564020f0800b005309eb7544fsm4528407eda.45.2023.09.18.09.04.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 21/22] exec/cpu: Have cpu_exec_realize() return a boolean Date: Mon, 18 Sep 2023 18:02:54 +0200 Message-ID: <20230918160257.30127-22-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Following the example documented since commit e3fe3988d7 ("error: Document Error API usage rules"), have cpu_exec_realizefn() return a boolean indicating whether an error is set or not. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 2 +- cpu.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 1e940f6bb5..3dc6968428 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1014,7 +1014,7 @@ G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...) /* $(top_srcdir)/cpu.c */ void cpu_class_init_props(DeviceClass *dc); void cpu_exec_initfn(CPUState *cpu); -void cpu_exec_realizefn(CPUState *cpu, Error **errp); +bool cpu_exec_realizefn(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); /** diff --git a/cpu.c b/cpu.c index 84b03c09ac..96ae440b81 100644 --- a/cpu.c +++ b/cpu.c @@ -131,7 +131,7 @@ const VMStateDescription vmstate_cpu_common = { }; #endif -void cpu_exec_realizefn(CPUState *cpu, Error **errp) +bool cpu_exec_realizefn(CPUState *cpu, Error **errp) { /* cache the cpu class for the hotpath */ cpu->cc = CPU_GET_CLASS(cpu); @@ -142,7 +142,7 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) } if (!accel_cpu_realizefn(cpu, errp)) { - return; + return false; } /* NB: errp parameter is unused currently */ @@ -169,6 +169,8 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu); } #endif /* CONFIG_USER_ONLY */ + + return true; } void cpu_exec_unrealizefn(CPUState *cpu)