| Message ID | 20230921082957.44628-9-xiong.y.zhang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Upgrade intel vPMU version to 5 | expand |
diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h index 4bab4819ea6c..b416094917fd 100644 --- a/arch/x86/kvm/pmu.h +++ b/arch/x86/kvm/pmu.h @@ -215,7 +215,7 @@ static inline void kvm_init_pmu_capability(const struct kvm_pmu_ops *pmu_ops) return; } - kvm_pmu_cap.version = min(kvm_pmu_cap.version, 2); + kvm_pmu_cap.version = min(kvm_pmu_cap.version, 5); kvm_pmu_cap.num_counters_gp = min(kvm_pmu_cap.num_counters_gp, pmu_ops->MAX_NR_GP_COUNTERS); kvm_pmu_cap.num_counters_fixed = min(kvm_pmu_cap.num_counters_fixed,
Modern intel processors have supported Architectural Performance Monitoring Version 5, this commit upgrade Intel vcpu's vPMU version from 2 to 5. Go through PMU features from version 3 to 5, the following features are not supported: 1. AnyThread counting: it is added in v3, and deprecated in v5. 2. Streamed Freeze_PerfMon_On_PMI in v4, since legacy Freeze_PerMon_ON_PMI isn't supported, the new one won't be supported neither. 3. IA32_PERF_GLOBAL_STATUS.ASCI[bit 60]: Related to SGX, and will be emulated by SGX developer later. 4. Domain Separation in v5. When INV flag in IA32_PERFEVTSELx is used, a counter stops counting when logical processor exits the C0 ACPI C-state. KVM has little information about guest ACPI C-state. When guest enable unsupported features through WRMSR, KVM will inject a #GP into guest. Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> --- Changelog: v1->v2: kvm_pmu_cap.version will not exceed 2 for AMD, no need to differentiate between Intel and AMD. --- arch/x86/kvm/pmu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)