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Sun, 29 Oct 2023 09:00:36 -0700 From: Yishai Hadas To: , , , CC: , , , , , , , , , , Subject: [PATCH V2 vfio 7/9] vfio/pci: Expose vfio_pci_core_setup_barmap() Date: Sun, 29 Oct 2023 17:59:50 +0200 Message-ID: <20231029155952.67686-8-yishaih@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20231029155952.67686-1-yishaih@nvidia.com> References: <20231029155952.67686-1-yishaih@nvidia.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB4A:EE_|BN9PR12MB5099:EE_ X-MS-Office365-Filtering-Correlation-Id: 2fb84758-70a5-41c5-ada1-08dbd8983c7d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: brC4Fccaet0E0aZa7y/2XpprxbYE7vKUOOEb+SOL9+cmGt2Vh2tKlg1oBF2+gdyBuLTyzdzV/S8MN3dBWesPQeq3mRypVc1ou+tO0TRmDiBdWCRpkbL+oNsoxbYMw0DDUKTWAr+3+c4WN0zD7mJW1L3fXGtQfdJuB4GeOO5HlhkklZc+k+EiLGQ6hWOQaAqy4H6/ydmaJeNvPu2LgysYBUi1YVV9BG0Y+rGmhIXpqUAlB+FE50J2N76Ypl+mfXlXbmfD/MpTEdOvBfgJECUdPC2FJrldPw7st8/38UC5PR4LmD7aJP/Zhf9fUSlx3Df3pKGXXjJymjSPKOjEw26MMAAfh65BwE4d5GsBZbkip2o9bsMQhmyOttpj+4/pTNwld2S9Xi/yJRxXL9PbR8LOKi2ra+GZa8k6Ljo026S8z2VFBDzppqFe2bOUkvCc06mnA4HzI9mePysawVJlpLSXx+n9xT3HLdLCPhR+kSRoSa+RxaH3ADrhFsEq8F2vI7p2r5uM3jmvdzRxmU2RpeaEqMixvXSoVl+yXdroEo6wFEYbpqDl86AaQ/QP6D2/AytIBMZkfYCc3JaQ2iu8LZcRrfQfXpdNBI14QXregAayH7Z6/dwt7W4Rfw2R2bk8hu0UmNgg0P0djfpi7vbonfzZT+HzV2spuBLdvdKjCyZqUJblBe28KWAfTIB9JUNZ3IeArHI9k6ZeAstz/OMQBuQYs0haWUv+4aJFZpm/pOnOXL6JkTjYIyU9G4ch24+aocJRf+hVntBPhJKMVT6MMlQUfg== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(396003)(346002)(39860400002)(376002)(136003)(230922051799003)(451199024)(64100799003)(186009)(1800799009)(82310400011)(40470700004)(36840700001)(46966006)(40460700003)(2906002)(36860700001)(6636002)(54906003)(70586007)(70206006)(47076005)(356005)(7636003)(82740400003)(316002)(6666004)(7696005)(478600001)(110136005)(83380400001)(2616005)(336012)(426003)(107886003)(1076003)(26005)(41300700001)(5660300002)(8936002)(8676002)(86362001)(40480700001)(36756003)(4326008)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Oct 2023 16:00:56.2367 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2fb84758-70a5-41c5-ada1-08dbd8983c7d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB4A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5099 Expose vfio_pci_core_setup_barmap() to be used by drivers. This will let drivers to mmap a BAR and re-use it from both vfio and the driver when it's applicable. This API will be used in the next patches by the vfio/virtio coming driver. Signed-off-by: Yishai Hadas --- drivers/vfio/pci/vfio_pci_core.c | 25 +++++++++++++++++++++++++ drivers/vfio/pci/vfio_pci_rdwr.c | 28 ++-------------------------- include/linux/vfio_pci_core.h | 1 + 3 files changed, 28 insertions(+), 26 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index 1929103ee59a..ebea39836dd9 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -684,6 +684,31 @@ void vfio_pci_core_disable(struct vfio_pci_core_device *vdev) } EXPORT_SYMBOL_GPL(vfio_pci_core_disable); +int vfio_pci_core_setup_barmap(struct vfio_pci_core_device *vdev, int bar) +{ + struct pci_dev *pdev = vdev->pdev; + void __iomem *io; + int ret; + + if (vdev->barmap[bar]) + return 0; + + ret = pci_request_selected_regions(pdev, 1 << bar, "vfio"); + if (ret) + return ret; + + io = pci_iomap(pdev, bar, 0); + if (!io) { + pci_release_selected_regions(pdev, 1 << bar); + return -ENOMEM; + } + + vdev->barmap[bar] = io; + + return 0; +} +EXPORT_SYMBOL_GPL(vfio_pci_core_setup_barmap); + void vfio_pci_core_close_device(struct vfio_device *core_vdev) { struct vfio_pci_core_device *vdev = diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c index e27de61ac9fe..6f08b3ecbb89 100644 --- a/drivers/vfio/pci/vfio_pci_rdwr.c +++ b/drivers/vfio/pci/vfio_pci_rdwr.c @@ -200,30 +200,6 @@ static ssize_t do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, return done; } -static int vfio_pci_setup_barmap(struct vfio_pci_core_device *vdev, int bar) -{ - struct pci_dev *pdev = vdev->pdev; - int ret; - void __iomem *io; - - if (vdev->barmap[bar]) - return 0; - - ret = pci_request_selected_regions(pdev, 1 << bar, "vfio"); - if (ret) - return ret; - - io = pci_iomap(pdev, bar, 0); - if (!io) { - pci_release_selected_regions(pdev, 1 << bar); - return -ENOMEM; - } - - vdev->barmap[bar] = io; - - return 0; -} - ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite) { @@ -262,7 +238,7 @@ ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf, } x_end = end; } else { - int ret = vfio_pci_setup_barmap(vdev, bar); + int ret = vfio_pci_core_setup_barmap(vdev, bar); if (ret) { done = ret; goto out; @@ -438,7 +414,7 @@ int vfio_pci_ioeventfd(struct vfio_pci_core_device *vdev, loff_t offset, return -EINVAL; #endif - ret = vfio_pci_setup_barmap(vdev, bar); + ret = vfio_pci_core_setup_barmap(vdev, bar); if (ret) return ret; diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 562e8754869d..67ac58e20e1d 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -127,6 +127,7 @@ int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf); int vfio_pci_core_enable(struct vfio_pci_core_device *vdev); void vfio_pci_core_disable(struct vfio_pci_core_device *vdev); void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev); +int vfio_pci_core_setup_barmap(struct vfio_pci_core_device *vdev, int bar); pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev, pci_channel_state_t state);