@@ -277,7 +277,7 @@ static int find_cpu_clusters(Object *child, void *opaque)
{
if (object_dynamic_cast(child, TYPE_CPU_CLUSTER)) {
GDBState *s = (GDBState *) opaque;
- CPUClusterState *cluster = CPU_CLUSTER(child);
+ CPUCluster *cluster = CPU_CLUSTER(child);
GDBProcess *process;
s->processes = g_renew(GDBProcess, s->processes, ++s->process_num);
@@ -26,12 +26,12 @@
#include "qapi/error.h"
static Property cpu_cluster_properties[] = {
- DEFINE_PROP_UINT32("cluster-id", CPUClusterState, cluster_id, 0),
+ DEFINE_PROP_UINT32("cluster-id", CPUCluster, cluster_id, 0),
DEFINE_PROP_END_OF_LIST()
};
typedef struct CallbackData {
- CPUClusterState *cluster;
+ CPUCluster *cluster;
int cpu_count;
} CallbackData;
@@ -50,7 +50,7 @@ static int add_cpu_to_cluster(Object *obj, void *opaque)
static void cpu_cluster_realize(DeviceState *dev, Error **errp)
{
/* Iterate through all our CPU children and set their cluster_index */
- CPUClusterState *cluster = CPU_CLUSTER(dev);
+ CPUCluster *cluster = CPU_CLUSTER(dev);
Object *cluster_obj = OBJECT(dev);
CallbackData cbdata = {
.cluster = cluster,
@@ -87,7 +87,7 @@ static void cpu_cluster_class_init(ObjectClass *klass, void *data)
static const TypeInfo cpu_cluster_type_info = {
.name = TYPE_CPU_CLUSTER,
.parent = TYPE_DEVICE,
- .instance_size = sizeof(CPUClusterState),
+ .instance_size = sizeof(CPUCluster),
.class_init = cpu_cluster_class_init,
};
@@ -153,7 +153,7 @@ struct ARMSSE {
/*< public >*/
ARMv7MState armv7m[SSE_MAX_CPUS];
- CPUClusterState cluster[SSE_MAX_CPUS];
+ CPUCluster cluster[SSE_MAX_CPUS];
IoTKitSecCtl secctl;
TZPPC apb_ppc[NUM_INTERNAL_PPCS];
TZMPC mpc[IOTS_NUM_MPC];
@@ -58,7 +58,7 @@ struct Versal {
struct {
struct {
MemoryRegion mr;
- CPUClusterState cluster;
+ CPUCluster cluster;
ARMCPU cpu[XLNX_VERSAL_NR_ACPUS];
GICv3State gic;
} apu;
@@ -88,7 +88,7 @@ struct Versal {
MemoryRegion mr;
MemoryRegion mr_ps_alias;
- CPUClusterState cluster;
+ CPUCluster cluster;
ARMCPU cpu[XLNX_VERSAL_NR_RCPUS];
} rpu;
@@ -98,8 +98,8 @@ struct XlnxZynqMPState {
DeviceState parent_obj;
/*< public >*/
- CPUClusterState apu_cluster;
- CPUClusterState rpu_cluster;
+ CPUCluster apu_cluster;
+ CPUCluster rpu_cluster;
ARMCPU apu_cpu[XLNX_ZYNQMP_NUM_APU_CPUS];
ARMCPU rpu_cpu[XLNX_ZYNQMP_NUM_RPU_CPUS];
GICState gic;
@@ -55,7 +55,7 @@
*/
#define TYPE_CPU_CLUSTER "cpu-cluster"
-OBJECT_DECLARE_SIMPLE_TYPE(CPUClusterState, CPU_CLUSTER)
+OBJECT_DECLARE_SIMPLE_TYPE(CPUCluster, CPU_CLUSTER)
/*
* This limit is imposed by TCG, which puts the cluster ID into an
@@ -64,13 +64,13 @@ OBJECT_DECLARE_SIMPLE_TYPE(CPUClusterState, CPU_CLUSTER)
#define MAX_CLUSTERS 255
/**
- * CPUClusterState:
+ * CPUCluster:
* @cluster_id: The cluster ID. This value is for internal use only and should
* not be exposed directly to the user or to the guest.
*
* State of a CPU cluster.
*/
-struct CPUClusterState {
+struct CPUCluster {
/*< private >*/
DeviceState parent_obj;
@@ -38,8 +38,8 @@ typedef struct MicrochipPFSoCState {
DeviceState parent_obj;
/*< public >*/
- CPUClusterState e_cluster;
- CPUClusterState u_cluster;
+ CPUCluster e_cluster;
+ CPUCluster u_cluster;
RISCVHartArrayState e_cpus;
RISCVHartArrayState u_cpus;
DeviceState *plic;
@@ -40,8 +40,8 @@ typedef struct SiFiveUSoCState {
DeviceState parent_obj;
/*< public >*/
- CPUClusterState e_cluster;
- CPUClusterState u_cluster;
+ CPUCluster e_cluster;
+ CPUCluster u_cluster;
RISCVHartArrayState e_cpus;
RISCVHartArrayState u_cpus;
DeviceState *plic;