From patchwork Thu Nov 30 14:41:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13474523 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="YCpFVBr6" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30E21B5 for ; Thu, 30 Nov 2023 06:35:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701354925; x=1732890925; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=f8dzVIiaV15FUJhTAcShJBTihquI/MGo+GvFSgqbGOs=; b=YCpFVBr6n2t/Aq77RLSNbdfBF3e8MnBBnXxZaQeGMS58f5ZWT8cou6kV FZfEkpfh/G4c+xkaCP6tCbwtTGVivbIjq7RAtz/WakKy99/GVGn5V4KeU k7WkLHdEXrTYajfRYLvWfhgb1T5hN5Vf+oevP1hCznCRSfF0WwM7T6iyB Egg8qFH3Zorz89lxsld9j+KTCOWOpFNfpiagyp1MQYKpktJozz8SD7QWa DurKcjvqz/fVtw0IQCA7auMEsg4JjAMBk8pQ8nS+/N2/ja0QB1ZykMEi/ Ruie2xAPhqaj5dI5/JCCoxyqs8D1tB1UrHSi3WZ4sYBxH2RA20SfgDEDV w==; X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="479532407" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="479532407" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2023 06:35:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="942730271" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="942730271" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orsmga005.jf.intel.com with ESMTP; 30 Nov 2023 06:35:15 -0800 From: Zhao Liu To: Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Richard Henderson , "Michael S . Tsirkin" , Jason Wang , Nicholas Piggin , Daniel Henrique Barboza , Igor Mammedov , =?utf-8?q?C=C3=A9dric_Le_Goater?= , =?utf-8?b?RnLDqWTDqXJp?= =?utf-8?b?YyBCYXJyYXQ=?= , David Gibson , Harsh Prateek Bora , Stefano Stabellini , Anthony Perard , Paul Durrant , Gerd Hoffmann , Peter Maydell , Alistair Francis , "Edgar E . Iglesias" , =?utf-8?q?Daniel_P_=2E_Ber?= =?utf-8?q?rang=C3=A9?= , Bin Meng , Palmer Dabbelt , Weiwei Li , Liu Zhiwei , qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org Cc: Nina Schoetterl-Glausch , Thomas Huth , Zhiyuan Lv , Zhenyu Wang , Yongwei Ma , Zhao Liu Subject: [RFC 31/41] hw/machine: Plug cpu-slot into machine to maintain topology tree Date: Thu, 30 Nov 2023 22:41:53 +0800 Message-Id: <20231130144203.2307629-32-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> References: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Zhao Liu Add a cpu-slot in machine as the root of topology tree to maintain the QOM topology. Signed-off-by: Zhao Liu --- hw/core/cpu-slot.c | 31 +++++++++++++++++++++++++++++++ include/hw/boards.h | 2 ++ include/hw/core/cpu-slot.h | 7 +++++++ system/vl.c | 2 ++ 4 files changed, 42 insertions(+) diff --git a/hw/core/cpu-slot.c b/hw/core/cpu-slot.c index 2a796ad5b6e7..4b148440ed3d 100644 --- a/hw/core/cpu-slot.c +++ b/hw/core/cpu-slot.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" +#include "hw/boards.h" #include "hw/core/cpu-slot.h" #include "qapi/error.h" @@ -165,3 +166,33 @@ static void cpu_slot_register_types(void) } type_init(cpu_slot_register_types) + +void machine_plug_cpu_slot(MachineState *ms) +{ + MachineClass *mc = MACHINE_GET_CLASS(ms); + + ms->topo = CPU_SLOT(qdev_new(TYPE_CPU_SLOT)); + + object_property_add_child(container_get(OBJECT(ms), "/peripheral"), + "cpu-slot", OBJECT(ms->topo)); + DEVICE(ms->topo)->id = g_strdup_printf("%s", "cpu-slot"); + + qdev_realize_and_unref(DEVICE(ms->topo), NULL, &error_abort); + ms->topo->ms = ms; + + if (!mc->smp_props.clusters_supported) { + clear_bit(CPU_TOPO_CLUSTER, ms->topo->supported_levels); + } + + if (!mc->smp_props.dies_supported) { + clear_bit(CPU_TOPO_DIE, ms->topo->supported_levels); + } + + if (!mc->smp_props.books_supported) { + clear_bit(CPU_TOPO_BOOK, ms->topo->supported_levels); + } + + if (!mc->smp_props.drawers_supported) { + clear_bit(CPU_TOPO_DRAWER, ms->topo->supported_levels); + } +} diff --git a/include/hw/boards.h b/include/hw/boards.h index da85f86efb91..81a7b04ece86 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -10,6 +10,7 @@ #include "qemu/module.h" #include "qom/object.h" #include "hw/core/cpu.h" +#include "hw/core/cpu-slot.h" #define TYPE_MACHINE_SUFFIX "-machine" @@ -398,6 +399,7 @@ struct MachineState { AccelState *accelerator; CPUArchIdList *possible_cpus; CpuTopology smp; + CPUSlot *topo; struct NVDIMMState *nvdimms_state; struct NumaState *numa_state; }; diff --git a/include/hw/core/cpu-slot.h b/include/hw/core/cpu-slot.h index 7bf51988afb3..1361af4ccfc0 100644 --- a/include/hw/core/cpu-slot.h +++ b/include/hw/core/cpu-slot.h @@ -78,6 +78,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(CPUSlot, CPU_SLOT) * when necessary. * @stat: Statistical topology information for topology tree. * @supported_levels: Supported topology levels for topology tree. + * @ms: Machine in which this cpu-slot is plugged. */ struct CPUSlot { /*< private >*/ @@ -87,6 +88,12 @@ struct CPUSlot { QTAILQ_HEAD(, CPUCore) cores; CPUTopoStat stat; DECLARE_BITMAP(supported_levels, USER_AVAIL_LEVEL_NUM); + MachineState *ms; }; +#define MACHINE_CORE_FOREACH(ms, core) \ + QTAILQ_FOREACH((core), &(ms)->topo->cores, node) + +void machine_plug_cpu_slot(MachineState *ms); + #endif /* CPU_SLOT_H */ diff --git a/system/vl.c b/system/vl.c index 65add2fb2460..637f708d2265 100644 --- a/system/vl.c +++ b/system/vl.c @@ -2128,6 +2128,8 @@ static void qemu_create_machine(QDict *qdict) false, &error_abort); qobject_unref(default_opts); } + + machine_plug_cpu_slot(current_machine); } static int global_init_func(void *opaque, QemuOpts *opts, Error **errp)