From patchwork Thu Nov 30 14:41:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13474527 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="gMXB3+mj" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 564BE93 for ; Thu, 30 Nov 2023 06:36:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701354964; x=1732890964; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1ATU854G1+lM0AKtC/FFv0wTbLk1yiIDIW9pRjL09lQ=; b=gMXB3+mjjKQ0txUUq0oJF3hc+0CBD+LJRHQX6MI5WJkLxJ3Ie1wzM6pj R72z0ueski/j0pDa/5w28L0Jo8DBKUG0MwRKdh+P/SHI+fQuLsNiyw9g7 isToOViddY9tgwzbkASDubuc6GwyMRQwavx3IxwmnhTojlJIAJyYoZ0IY DVHGXT1sGsVxDQGCjeWj181QtpcqcrivVN14lVgETZblx/pxBXA7X3syD ZXu5xC5pEy0LjWF3WAdFQBHaWtanEwWDaEtJ2xk6TYzNjg5xFcZjk5Cbc hOZPUo5mpXYFg3adJJhj6XWRUEakUtwB0SvuvCyc+oOtPD3dWpU4X8lMZ w==; X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="479532576" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="479532576" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2023 06:36:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="942730346" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="942730346" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orsmga005.jf.intel.com with ESMTP; 30 Nov 2023 06:35:54 -0800 From: Zhao Liu To: Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Richard Henderson , "Michael S . Tsirkin" , Jason Wang , Nicholas Piggin , Daniel Henrique Barboza , Igor Mammedov , =?utf-8?q?C=C3=A9dric_Le_Goater?= , =?utf-8?b?RnLDqWTDqXJp?= =?utf-8?b?YyBCYXJyYXQ=?= , David Gibson , Harsh Prateek Bora , Stefano Stabellini , Anthony Perard , Paul Durrant , Gerd Hoffmann , Peter Maydell , Alistair Francis , "Edgar E . Iglesias" , =?utf-8?q?Daniel_P_=2E_Ber?= =?utf-8?q?rang=C3=A9?= , Bin Meng , Palmer Dabbelt , Weiwei Li , Liu Zhiwei , qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org Cc: Nina Schoetterl-Glausch , Thomas Huth , Zhiyuan Lv , Zhenyu Wang , Yongwei Ma , Zhao Liu Subject: [RFC 35/41] hw/i386: Make x86_cpu_new() private in x86.c Date: Thu, 30 Nov 2023 22:41:57 +0800 Message-Id: <20231130144203.2307629-36-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> References: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Zhao Liu x86_cpu_new() is only invoked in x86.c. Declear it as static in x86.c. Signed-off-by: Zhao Liu --- hw/i386/x86.c | 3 ++- include/hw/i386/x86.h | 2 -- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/i386/x86.c b/hw/i386/x86.c index b3d054889bba..d9293846db64 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -95,7 +95,8 @@ uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, } -void x86_cpu_new(X86MachineState *x86ms, int64_t apic_id, Error **errp) +static void x86_cpu_new(X86MachineState *x86ms, int64_t apic_id, + Error **errp) { Object *cpu = object_new(MACHINE(x86ms)->cpu_type); diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index da19ae15463a..19e9f93fe286 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -97,8 +97,6 @@ OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE) uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms, unsigned int cpu_index); - -void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp); void x86_cpus_init(X86MachineState *pcms, int default_cpu_version); CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms, unsigned cpu_index);