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Mon, 18 Dec 2023 00:38:53 -0800 From: Yishai Hadas To: , , , CC: , , , , , , , , , , Subject: [PATCH V9 vfio 7/9] vfio/pci: Expose vfio_pci_core_setup_barmap() Date: Mon, 18 Dec 2023 10:37:53 +0200 Message-ID: <20231218083755.96281-8-yishaih@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20231218083755.96281-1-yishaih@nvidia.com> References: <20231218083755.96281-1-yishaih@nvidia.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB78:EE_|CY8PR12MB8266:EE_ X-MS-Office365-Filtering-Correlation-Id: cbb60fd4-48ce-4bf2-163f-08dbffa4d03a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: MeXLy33B2S4skMDPt4biLJYejZO7o2LHeQTZBEnORGvevKF6iWGMDhaSN5TDCWhZ9TY+6/f0gTkkgyRbVSRtQEIsnOvzZr9Y4TxgnR2z+PNk5u+CoQ8COTsaKqh4Dkqc7ZzQ+AJmhF/jwFTlqC/iv3OnAQA0JfPnC4MRCmHN5gxsuJtoGgFrkFDzetoqBQo7OTL9+jpuGgqKd9thQkGX3HFx2oLgPOkaHT89Umh/lk0RzwghPhZXgY7m00NGyB/nCn1iVu0mkyod63cqwmR86ysYYZvR1a1p6uoOY2kdlHkWMrTNscat9awAmP9lLaRH41OziZIlS7VSIsMTxiyC/Pv7xfmVBWm1JrEcXJF2pk4D9BVMUZtZvXbe9Ufnfggwc/0CSqeGnLzGTIQKiNuCowXwz4TbaBrcGpK0UxeUrt2eOin92dlJo/d1wVZfA+j/1wkFRzkMluNqfYl9jhq5a2VMG9evP97BUGsonUDUD5MQ+xgtYXbFl2Dgl5uxlJNXJAPtwyAzmbjbh1E3qNT2exYjJN62O27OQfjQntdT/LLkLEUu6tRd0KvN3AK1JKapEuI+K1rmFZJW9nLN8IzE+N/5ufHfQqQEF7aHSnfvEsWhsRYpglbQkjMcdAgjUmlmdoKwyrj9ZOyLjfdF9PIsD6GKR/DDRCgutMhGCJhuiLswdFVaTeOdeUKRu4LvAuIInOXRRd5iA+RK2tFqiGD+o18REjgWRSEyRO8LKejU6EigdE0Afy4+Z6nilLetvgnNmc5h9bT6/QMpxHvM+SiD4g== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(376002)(396003)(136003)(346002)(230922051799003)(82310400011)(1800799012)(186009)(451199024)(64100799003)(36840700001)(46966006)(40470700004)(83380400001)(107886003)(70206006)(6636002)(110136005)(478600001)(54906003)(2616005)(316002)(1076003)(40480700001)(26005)(70586007)(336012)(426003)(4326008)(47076005)(8676002)(8936002)(7696005)(40460700003)(36860700001)(5660300002)(2906002)(86362001)(7636003)(356005)(82740400003)(36756003)(41300700001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Dec 2023 08:39:13.4212 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cbb60fd4-48ce-4bf2-163f-08dbffa4d03a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB78.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8266 Expose vfio_pci_core_setup_barmap() to be used by drivers. This will let drivers to mmap a BAR and re-use it from both vfio and the driver when it's applicable. This API will be used in the next patches by the vfio/virtio coming driver. Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Signed-off-by: Yishai Hadas --- drivers/vfio/pci/vfio_pci_rdwr.c | 7 ++++--- include/linux/vfio_pci_core.h | 1 + 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c index e27de61ac9fe..a9887fd6de46 100644 --- a/drivers/vfio/pci/vfio_pci_rdwr.c +++ b/drivers/vfio/pci/vfio_pci_rdwr.c @@ -200,7 +200,7 @@ static ssize_t do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, return done; } -static int vfio_pci_setup_barmap(struct vfio_pci_core_device *vdev, int bar) +int vfio_pci_core_setup_barmap(struct vfio_pci_core_device *vdev, int bar) { struct pci_dev *pdev = vdev->pdev; int ret; @@ -223,6 +223,7 @@ static int vfio_pci_setup_barmap(struct vfio_pci_core_device *vdev, int bar) return 0; } +EXPORT_SYMBOL_GPL(vfio_pci_core_setup_barmap); ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite) @@ -262,7 +263,7 @@ ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf, } x_end = end; } else { - int ret = vfio_pci_setup_barmap(vdev, bar); + int ret = vfio_pci_core_setup_barmap(vdev, bar); if (ret) { done = ret; goto out; @@ -438,7 +439,7 @@ int vfio_pci_ioeventfd(struct vfio_pci_core_device *vdev, loff_t offset, return -EINVAL; #endif - ret = vfio_pci_setup_barmap(vdev, bar); + ret = vfio_pci_core_setup_barmap(vdev, bar); if (ret) return ret; diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 562e8754869d..67ac58e20e1d 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -127,6 +127,7 @@ int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf); int vfio_pci_core_enable(struct vfio_pci_core_device *vdev); void vfio_pci_core_disable(struct vfio_pci_core_device *vdev); void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev); +int vfio_pci_core_setup_barmap(struct vfio_pci_core_device *vdev, int bar); pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev, pci_channel_state_t state);