From patchwork Wed Jan 10 23:13:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Kumar Patra X-Patchwork-Id: 13516657 Received: from mail-il1-f173.google.com (mail-il1-f173.google.com [209.85.166.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39A334F8AA for ; Wed, 10 Jan 2024 23:14:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="0F98St71" Received: by mail-il1-f173.google.com with SMTP id e9e14a558f8ab-3608bdb484fso11499095ab.1 for ; Wed, 10 Jan 2024 15:14:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1704928481; x=1705533281; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DpN1MW+95i3F5wasxziCwuSYEcNzMGQOQLUR8+9YpL0=; b=0F98St71ILMisMGT6EsMyuiC5F0vqPN8co9EpR+2OW/piJMMgnwqKDyTXQHYHIzK2C HswkcuSfpjy3Wj5Mgr7M0NoQpCETx2nT23lVUUpxPyc7KuzJlyxuNAcrasniF3F4SaSQ TOCJxYujAlZc5mFSnH0Wspziv4eLUAbNJo5SZylut+rVOBVyJ5OAobJ0F9po9XoNP4Cg JwKFqYoVGdFlSq/Py1mAGtVKgIqfBPx/enXVr9gXvS0CozeWsFk8a42FpCYBaOCR5YgY HZm1VOilzaD5i/v3hbCYs+C42qiryFfKI0yBgeuQy861Aju4fIY+V7Ye5/F1AyTIiIf6 yrWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704928481; x=1705533281; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DpN1MW+95i3F5wasxziCwuSYEcNzMGQOQLUR8+9YpL0=; b=jL7gWj128rlEaiI0YX5THZI0h6jwnEf7/wAWx1Rn0odlzMVdgbCvgxKSv1BDFUSmpD v5up4m8D4oaRk+Sc7eU1L1maeRPpen3sKBcoA9q4RfR5BNaLZOeCj48fxj/cSz2eZLtR nU6l7xdHpYU8cIiWHRkblGRuHutNz5Ls605JxQUpmitfCVUzFGQ1EJ2xEDLW0CpEFdoi srwDY/C+X1WRKImNT7cFJUBHqatxKfde4rnHJ0KdkNpAKJpO5SI7oovypScq3dO8MDHj JmuHhQOUHpn+fWpw9qXKL54ZrWVzaQALLK+PamWicgzKPT7mlUwElhSiSrIJr3eVixsH +LOg== X-Gm-Message-State: AOJu0YwFAp3cz3t8xN/7sA+PgQF6vG1EabkO1IDXbQNMGqePVGVPoBBF vmPP99fyWJLJ9z5xxTMAZ4FBSDmOTe1hIw== X-Google-Smtp-Source: AGHT+IEerfI4D/HCt6Wq/EDTg532UTtpPwmlvQqg9CrVuB5160up0pSpFPO/ZG+KXWk1i3x4xdcmZg== X-Received: by 2002:a05:6e02:180b:b0:360:7947:f14f with SMTP id a11-20020a056e02180b00b003607947f14fmr650893ilv.17.1704928481341; Wed, 10 Jan 2024 15:14:41 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id co13-20020a0566383e0d00b0046e3b925818sm1185503jab.37.2024.01.10.15.14.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 15:14:41 -0800 (PST) From: Atish Patra To: linux-kernel@vger.kernel.org Cc: Atish Patra , Conor Dooley , Anup Patel , Alexandre Ghiti , Andrew Jones , Atish Patra , Guo Ren , Icenowy Zheng , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paul Walmsley , Will Deacon , Vladimir Isaev Subject: [v3 02/10] RISC-V: Add FIRMWARE_READ_HI definition Date: Wed, 10 Jan 2024 15:13:51 -0800 Message-Id: <20240110231359.1239367-3-atishp@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240110231359.1239367-1-atishp@rivosinc.com> References: <20240110231359.1239367-1-atishp@rivosinc.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SBI v2.0 added another function to SBI PMU extension to read the upper bits of a counter with width larger than XLEN. Add the definition for that function. Acked-by: Conor Dooley Reviewed-by: Anup Patel Signed-off-by: Atish Patra --- arch/riscv/include/asm/sbi.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index b6f898c56940..914eacc6ba2e 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -122,6 +122,7 @@ enum sbi_ext_pmu_fid { SBI_EXT_PMU_COUNTER_START, SBI_EXT_PMU_COUNTER_STOP, SBI_EXT_PMU_COUNTER_FW_READ, + SBI_EXT_PMU_COUNTER_FW_READ_HI, }; union sbi_pmu_ctr_info {