From patchwork Thu Jan 25 03:23:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13529889 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E41081B295 for ; Thu, 25 Jan 2024 03:30:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706153405; cv=none; b=K+35yzxYa6p1qXTPcga2JZ/OAPsComldl7xM2aeCbaTAYO4tbQxR3RGWh+VYuocjAIerRZgl2KT2gNurXNVxKqEqPoRrlunWRvbwqizp4kQBEozmBK7HOCHoRmY71DscvLsurHJFGoR44pwUzLg7aIpD9XMWziarP211Idg/jbk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706153405; c=relaxed/simple; bh=D7IKu0Ugz8vLyuxnCEQ1DNDK7JfT6+Ri9zy7tWOOvJc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=jL0nVd/v71CUxSgIKNmrteYXxx9bKGhDLJ9mutzhyxUeB8ccXIn6MFKST9pKHO69qa3oNlKbxjEKcqsekwvPEdvLIxmp0YtmylfNycpYho4TblRh0BMS9RmTfu1CE0GM3gn5jRXb1Lz2X2uvVZcMlnpDCY+WKUzsxHBGOrJVHGc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=foo8Pyt/; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="foo8Pyt/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706153404; x=1737689404; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=D7IKu0Ugz8vLyuxnCEQ1DNDK7JfT6+Ri9zy7tWOOvJc=; b=foo8Pyt/9pfo8qg54ZRMzIDdESoG5mtrjXBrK+hWRLuL39AqQ52PTE8G FBQx0BwRzIkIi1EzPAX2mOqm03ypoKmin4d4PnHIWyvAVcvI+46w5V/1H XZPejcsrIZlZ5xMGYPsNspIfOKazjnYQA3ZhQAOZ4lQ6L4fCuxUZaCOqq TCeSSTd/SyczEfm7cwT10N13orG6Dw7x397T1+JLzdC5c32tkFkR6+3+N mpnvpJfvaFp8I18EhaHT8EKEQeaFF+Sr2S3cfuOOkQ2/9MA1g6Cm/7HFD s7MUc7O59JFtTHh6w9oaZ/iqZ86FOihq9RX0tqFq1/OyK28THnpP8+twd A==; X-IronPort-AV: E=McAfee;i="6600,9927,10962"; a="9429436" X-IronPort-AV: E=Sophos;i="6.05,216,1701158400"; d="scan'208";a="9429436" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2024 19:27:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,216,1701158400"; d="scan'208";a="2085888" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by orviesa005.jf.intel.com with ESMTP; 24 Jan 2024 19:27:01 -0800 From: Xiaoyao Li To: Paolo Bonzini , David Hildenbrand , Igor Mammedov , "Michael S . Tsirkin" , Marcel Apfelbaum , Richard Henderson , Peter Xu , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Cornelia Huck , =?utf-8?q?Daniel_P_=2E_Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com, Michael Roth , Sean Christopherson , Claudio Fontana , Gerd Hoffmann , Isaku Yamahata , Chenyi Qiang Subject: [PATCH v4 38/66] i386/tdx: Skip BIOS shadowing setup Date: Wed, 24 Jan 2024 22:23:00 -0500 Message-Id: <20240125032328.2522472-39-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240125032328.2522472-1-xiaoyao.li@intel.com> References: <20240125032328.2522472-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 TDX doesn't support map different GPAs to same private memory. Thus, aliasing top 128KB of BIOS as isa-bios is not supported. On the other hand, TDX guest cannot go to real mode, it can work fine without isa-bios. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- Changes in v1: - update commit message and comment to clarify --- hw/i386/x86.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 343a929e1825..f7352b06c3e6 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -1179,17 +1179,20 @@ void x86_bios_rom_init(MachineState *ms, const char *default_firmware, } g_free(filename); - /* map the last 128KB of the BIOS in ISA space */ - isa_bios_size = MIN(bios_size, 128 * KiB); - isa_bios = g_malloc(sizeof(*isa_bios)); - memory_region_init_alias(isa_bios, NULL, "isa-bios", bios, - bios_size - isa_bios_size, isa_bios_size); - memory_region_add_subregion_overlap(rom_memory, - 0x100000 - isa_bios_size, - isa_bios, - 1); - if (!isapc_ram_fw) { - memory_region_set_readonly(isa_bios, true); + /* For TDX, alias different GPAs to same private memory is not supported */ + if (!is_tdx_vm()) { + /* map the last 128KB of the BIOS in ISA space */ + isa_bios_size = MIN(bios_size, 128 * KiB); + isa_bios = g_malloc(sizeof(*isa_bios)); + memory_region_init_alias(isa_bios, NULL, "isa-bios", bios, + bios_size - isa_bios_size, isa_bios_size); + memory_region_add_subregion_overlap(rom_memory, + 0x100000 - isa_bios_size, + isa_bios, + 1); + if (!isapc_ram_fw) { + memory_region_set_readonly(isa_bios, true); + } } /* map all the bios at the top of memory */