From patchwork Thu Jan 25 03:23:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13529899 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE55E11185 for ; Thu, 25 Jan 2024 03:30:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706153428; cv=none; b=QuLtl7vThds3F4hlyvSs2UkBzz9hDq92IOySGpjKsmmjp4EXeGFSGw4wZLW8u6lBsCMpH1B+jhWxMjLytbtfGP7OROQqxQHUyqEay4wulR4AwCiYPFMVx83VQDEEmtMn+9eKuuTiiBP2ZTZUeeqJ4wFPyBW/5Dff39abwtU94jw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706153428; c=relaxed/simple; bh=O90Sz6D/CUBJHW4iQssE9lD+uGaFEj7py9EJ59KxMp8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=I9tQ9oFBvMNW20Xt2RT5cjRtau8wkS3w707QhpRmpUk+Df4Fsov9Hl0dM6dejwiXqFkBxVaM+i5osoxUEz6vwbnCnN/6VGEF67U3vdA55oBU+Pi8oKNONoawzRIFwsyjKypSGCAD+7y95EOIlBsHMr14LIfW6deNUQUUM6E65YU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=LrXhvTU7; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LrXhvTU7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706153423; x=1737689423; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=O90Sz6D/CUBJHW4iQssE9lD+uGaFEj7py9EJ59KxMp8=; b=LrXhvTU728NXm+DaHeVcg0tfe66F/6l7IafUHQBNXdSwcQN7ko+gbikA f4/qkSA9PMNoH96DhLNcRaqrZv/6XcnQirKZAAstPPQOr99qB/Y0jYsW6 YvNp/zIBtzWaNH8jL+pxgcn6FG7Q0eao9voGSbp0V6yR3yeFFfk+UHPyO yN6g4CSJ72mVfYSR8CEA/9be0wMMwyV8hyMrs/Wo6RiHkEydSThK26J0m ZcBvb5wGNKR/bu+WVza3SAA6fMfWACt8E9sdgDb5FTXHPXx+tVYk1nkY4 vBGZ97omUpkFcq8NLhkXa9gfqYrR7pOFbstYGU+a0dnXr7zZB+Pxf3SvH A==; X-IronPort-AV: E=McAfee;i="6600,9927,10962"; a="9429751" X-IronPort-AV: E=Sophos;i="6.05,216,1701158400"; d="scan'208";a="9429751" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2024 19:27:44 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,216,1701158400"; d="scan'208";a="2086065" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by orviesa005.jf.intel.com with ESMTP; 24 Jan 2024 19:27:39 -0800 From: Xiaoyao Li To: Paolo Bonzini , David Hildenbrand , Igor Mammedov , "Michael S . Tsirkin" , Marcel Apfelbaum , Richard Henderson , Peter Xu , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Cornelia Huck , =?utf-8?q?Daniel_P_=2E_Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com, Michael Roth , Sean Christopherson , Claudio Fontana , Gerd Hoffmann , Isaku Yamahata , Chenyi Qiang Subject: [PATCH v4 45/66] memory: Introduce memory_region_init_ram_guest_memfd() Date: Wed, 24 Jan 2024 22:23:07 -0500 Message-Id: <20240125032328.2522472-46-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240125032328.2522472-1-xiaoyao.li@intel.com> References: <20240125032328.2522472-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Introduce memory_region_init_ram_guest_memfd() to allocate private guset memfd on the MemoryRegion initialization. It's for the use case of TDVF, which must be private on TDX case. Signed-off-by: Xiaoyao Li --- include/exec/memory.h | 6 ++++++ system/memory.c | 27 +++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/include/exec/memory.h b/include/exec/memory.h index f25959f6d30f..3a7f41b030e8 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1607,6 +1607,12 @@ bool memory_region_init_ram(MemoryRegion *mr, uint64_t size, Error **errp); +bool memory_region_init_ram_guest_memfd(MemoryRegion *mr, + Object *owner, + const char *name, + uint64_t size, + Error **errp); + /** * memory_region_init_rom: Initialize a ROM memory region. * diff --git a/system/memory.c b/system/memory.c index 74f647f2e56f..41049d3e4c9a 100644 --- a/system/memory.c +++ b/system/memory.c @@ -3619,6 +3619,33 @@ bool memory_region_init_ram(MemoryRegion *mr, return true; } +bool memory_region_init_ram_guest_memfd(MemoryRegion *mr, + Object *owner, + const char *name, + uint64_t size, + Error **errp) +{ + DeviceState *owner_dev; + + if (!memory_region_init_ram_flags_nomigrate(mr, owner, name, size, + RAM_GUEST_MEMFD, errp)) { + return false; + } + + memory_region_set_default_private(mr); + + /* This will assert if owner is neither NULL nor a DeviceState. + * We only want the owner here for the purposes of defining a + * unique name for migration. TODO: Ideally we should implement + * a naming scheme for Objects which are not DeviceStates, in + * which case we can relax this restriction. + */ + owner_dev = DEVICE(owner); + vmstate_register_ram(mr, owner_dev); + + return true; +} + bool memory_region_init_rom(MemoryRegion *mr, Object *owner, const char *name,