diff mbox series

[v2,23/23] target/sparc: Prefer fast cpu_env() over slower CPU QOM cast macro

Message ID 20240126220407.95022-24-philmd@linaro.org (mailing list archive)
State New, archived
Headers show
Series hw,target: Prefer fast cpu_env() over slower CPU QOM cast macro | expand

Commit Message

Philippe Mathieu-Daudé Jan. 26, 2024, 10:04 p.m. UTC 
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/sparc/cpu.c          | 14 ++++----------
 target/sparc/gdbstub.c      |  3 +--
 target/sparc/int32_helper.c |  3 +--
 target/sparc/int64_helper.c |  3 +--
 target/sparc/ldst_helper.c  |  6 ++----
 target/sparc/mmu_helper.c   | 15 +++++----------
 target/sparc/translate.c    |  3 +--
 7 files changed, 15 insertions(+), 32 deletions(-)

Comments

Mark Cave-Ayland Jan. 29, 2024, 9:43 p.m. UTC | #1 
On 26/01/2024 22:04, Philippe Mathieu-Daudé wrote:

> Mechanical patch produced running the command documented
> in scripts/coccinelle/cpu_env.cocci_template header.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/sparc/cpu.c          | 14 ++++----------
>   target/sparc/gdbstub.c      |  3 +--
>   target/sparc/int32_helper.c |  3 +--
>   target/sparc/int64_helper.c |  3 +--
>   target/sparc/ldst_helper.c  |  6 ++----
>   target/sparc/mmu_helper.c   | 15 +++++----------
>   target/sparc/translate.c    |  3 +--
>   7 files changed, 15 insertions(+), 32 deletions(-)
> 
> diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
> index befa7fc4eb..a53c200d8b 100644
> --- a/target/sparc/cpu.c
> +++ b/target/sparc/cpu.c
> @@ -83,8 +83,7 @@ static void sparc_cpu_reset_hold(Object *obj)
>   static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
>   {
>       if (interrupt_request & CPU_INTERRUPT_HARD) {
> -        SPARCCPU *cpu = SPARC_CPU(cs);
> -        CPUSPARCState *env = &cpu->env;
> +        CPUSPARCState *env = cpu_env(cs);
>   
>           if (cpu_interrupts_enabled(env) && env->interrupt_index > 0) {
>               int pil = env->interrupt_index & 0xf;
> @@ -613,8 +612,7 @@ static void cpu_print_cc(FILE *f, uint32_t cc)
>   
>   static void sparc_cpu_dump_state(CPUState *cs, FILE *f, int flags)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>       int i, x;
>   
>       qemu_fprintf(f, "pc: " TARGET_FMT_lx "  npc: " TARGET_FMT_lx "\n", env->pc,
> @@ -711,11 +709,8 @@ static void sparc_cpu_synchronize_from_tb(CPUState *cs,
>   
>   static bool sparc_cpu_has_work(CPUState *cs)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> -
>       return (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
> -           cpu_interrupts_enabled(env);
> +           cpu_interrupts_enabled(cpu_env(cs));
>   }
>   
>   static char *sparc_cpu_type_name(const char *cpu_model)
> @@ -749,8 +744,7 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
>       CPUState *cs = CPU(dev);
>       SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
>       Error *local_err = NULL;
> -    SPARCCPU *cpu = SPARC_CPU(dev);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>   
>   #if defined(CONFIG_USER_ONLY)
>       /* We are emulating the kernel, which will trap and emulate float128. */
> diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c
> index a1c8fdc4d5..5257c49a0d 100644
> --- a/target/sparc/gdbstub.c
> +++ b/target/sparc/gdbstub.c
> @@ -29,8 +29,7 @@
>   
>   int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>   
>       if (n < 8) {
>           /* g0..g7 */
> diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c
> index 058dd712b5..6b7d65b031 100644
> --- a/target/sparc/int32_helper.c
> +++ b/target/sparc/int32_helper.c
> @@ -99,8 +99,7 @@ void cpu_check_irqs(CPUSPARCState *env)
>   
>   void sparc_cpu_do_interrupt(CPUState *cs)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>       int cwp, intno = cs->exception_index;
>   
>       if (qemu_loglevel_mask(CPU_LOG_INT)) {
> diff --git a/target/sparc/int64_helper.c b/target/sparc/int64_helper.c
> index 27df9dba89..bd14c7a0db 100644
> --- a/target/sparc/int64_helper.c
> +++ b/target/sparc/int64_helper.c
> @@ -130,8 +130,7 @@ void cpu_check_irqs(CPUSPARCState *env)
>   
>   void sparc_cpu_do_interrupt(CPUState *cs)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>       int intno = cs->exception_index;
>       trap_state *tsptr;
>   
> diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
> index 09066d5487..203441bfb2 100644
> --- a/target/sparc/ldst_helper.c
> +++ b/target/sparc/ldst_helper.c
> @@ -421,8 +421,7 @@ static void sparc_raise_mmu_fault(CPUState *cs, hwaddr addr,
>                                     bool is_write, bool is_exec, int is_asi,
>                                     unsigned size, uintptr_t retaddr)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>       int fault_type;
>   
>   #ifdef DEBUG_UNASSIGNED
> @@ -483,8 +482,7 @@ static void sparc_raise_mmu_fault(CPUState *cs, hwaddr addr,
>                                     bool is_write, bool is_exec, int is_asi,
>                                     unsigned size, uintptr_t retaddr)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>   
>   #ifdef DEBUG_UNASSIGNED
>       printf("Unassigned mem access to " HWADDR_FMT_plx " from " TARGET_FMT_lx
> diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
> index 453498c670..a05ee22315 100644
> --- a/target/sparc/mmu_helper.c
> +++ b/target/sparc/mmu_helper.c
> @@ -206,8 +206,7 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>                           MMUAccessType access_type, int mmu_idx,
>                           bool probe, uintptr_t retaddr)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>       CPUTLBEntryFull full = {};
>       target_ulong vaddr;
>       int error_code = 0, access_index;
> @@ -391,8 +390,7 @@ void dump_mmu(CPUSPARCState *env)
>   int sparc_cpu_memory_rw_debug(CPUState *cs, vaddr address,
>                                 uint8_t *buf, int len, bool is_write)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>       target_ulong addr = address;
>       int i;
>       int len1;
> @@ -759,8 +757,7 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>                           MMUAccessType access_type, int mmu_idx,
>                           bool probe, uintptr_t retaddr)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>       CPUTLBEntryFull full = {};
>       int error_code = 0, access_index;
>   
> @@ -898,8 +895,7 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
>   
>   hwaddr sparc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>       hwaddr phys_addr;
>       int mmu_idx = cpu_mmu_index(env, false);
>   
> @@ -916,8 +912,7 @@ G_NORETURN void sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
>                                                 int mmu_idx,
>                                                 uintptr_t retaddr)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>   
>   #ifdef TARGET_SPARC64
>       env->dmmu.sfsr = build_sfsr(env, mmu_idx, access_type);
> diff --git a/target/sparc/translate.c b/target/sparc/translate.c
> index 9387299559..412b7d1b66 100644
> --- a/target/sparc/translate.c
> +++ b/target/sparc/translate.c
> @@ -5406,8 +5406,7 @@ void sparc_restore_state_to_opc(CPUState *cs,
>                                   const TranslationBlock *tb,
>                                   const uint64_t *data)
>   {
> -    SPARCCPU *cpu = SPARC_CPU(cs);
> -    CPUSPARCState *env = &cpu->env;
> +    CPUSPARCState *env = cpu_env(cs);
>       target_ulong pc = data[0];
>       target_ulong npc = data[1];
>   

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>


ATB,

Mark.
diff mbox series

Patch

diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index befa7fc4eb..a53c200d8b 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -83,8 +83,7 @@  static void sparc_cpu_reset_hold(Object *obj)
 static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
 {
     if (interrupt_request & CPU_INTERRUPT_HARD) {
-        SPARCCPU *cpu = SPARC_CPU(cs);
-        CPUSPARCState *env = &cpu->env;
+        CPUSPARCState *env = cpu_env(cs);
 
         if (cpu_interrupts_enabled(env) && env->interrupt_index > 0) {
             int pil = env->interrupt_index & 0xf;
@@ -613,8 +612,7 @@  static void cpu_print_cc(FILE *f, uint32_t cc)
 
 static void sparc_cpu_dump_state(CPUState *cs, FILE *f, int flags)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
     int i, x;
 
     qemu_fprintf(f, "pc: " TARGET_FMT_lx "  npc: " TARGET_FMT_lx "\n", env->pc,
@@ -711,11 +709,8 @@  static void sparc_cpu_synchronize_from_tb(CPUState *cs,
 
 static bool sparc_cpu_has_work(CPUState *cs)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
-
     return (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
-           cpu_interrupts_enabled(env);
+           cpu_interrupts_enabled(cpu_env(cs));
 }
 
 static char *sparc_cpu_type_name(const char *cpu_model)
@@ -749,8 +744,7 @@  static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
     CPUState *cs = CPU(dev);
     SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
     Error *local_err = NULL;
-    SPARCCPU *cpu = SPARC_CPU(dev);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
 
 #if defined(CONFIG_USER_ONLY)
     /* We are emulating the kernel, which will trap and emulate float128. */
diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c
index a1c8fdc4d5..5257c49a0d 100644
--- a/target/sparc/gdbstub.c
+++ b/target/sparc/gdbstub.c
@@ -29,8 +29,7 @@ 
 
 int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
 
     if (n < 8) {
         /* g0..g7 */
diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c
index 058dd712b5..6b7d65b031 100644
--- a/target/sparc/int32_helper.c
+++ b/target/sparc/int32_helper.c
@@ -99,8 +99,7 @@  void cpu_check_irqs(CPUSPARCState *env)
 
 void sparc_cpu_do_interrupt(CPUState *cs)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
     int cwp, intno = cs->exception_index;
 
     if (qemu_loglevel_mask(CPU_LOG_INT)) {
diff --git a/target/sparc/int64_helper.c b/target/sparc/int64_helper.c
index 27df9dba89..bd14c7a0db 100644
--- a/target/sparc/int64_helper.c
+++ b/target/sparc/int64_helper.c
@@ -130,8 +130,7 @@  void cpu_check_irqs(CPUSPARCState *env)
 
 void sparc_cpu_do_interrupt(CPUState *cs)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
     int intno = cs->exception_index;
     trap_state *tsptr;
 
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 09066d5487..203441bfb2 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -421,8 +421,7 @@  static void sparc_raise_mmu_fault(CPUState *cs, hwaddr addr,
                                   bool is_write, bool is_exec, int is_asi,
                                   unsigned size, uintptr_t retaddr)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
     int fault_type;
 
 #ifdef DEBUG_UNASSIGNED
@@ -483,8 +482,7 @@  static void sparc_raise_mmu_fault(CPUState *cs, hwaddr addr,
                                   bool is_write, bool is_exec, int is_asi,
                                   unsigned size, uintptr_t retaddr)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
 
 #ifdef DEBUG_UNASSIGNED
     printf("Unassigned mem access to " HWADDR_FMT_plx " from " TARGET_FMT_lx
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 453498c670..a05ee22315 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -206,8 +206,7 @@  bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                         MMUAccessType access_type, int mmu_idx,
                         bool probe, uintptr_t retaddr)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
     CPUTLBEntryFull full = {};
     target_ulong vaddr;
     int error_code = 0, access_index;
@@ -391,8 +390,7 @@  void dump_mmu(CPUSPARCState *env)
 int sparc_cpu_memory_rw_debug(CPUState *cs, vaddr address,
                               uint8_t *buf, int len, bool is_write)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
     target_ulong addr = address;
     int i;
     int len1;
@@ -759,8 +757,7 @@  bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                         MMUAccessType access_type, int mmu_idx,
                         bool probe, uintptr_t retaddr)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
     CPUTLBEntryFull full = {};
     int error_code = 0, access_index;
 
@@ -898,8 +895,7 @@  hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
 
 hwaddr sparc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
     hwaddr phys_addr;
     int mmu_idx = cpu_mmu_index(env, false);
 
@@ -916,8 +912,7 @@  G_NORETURN void sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
                                               int mmu_idx,
                                               uintptr_t retaddr)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
 
 #ifdef TARGET_SPARC64
     env->dmmu.sfsr = build_sfsr(env, mmu_idx, access_type);
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 9387299559..412b7d1b66 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -5406,8 +5406,7 @@  void sparc_restore_state_to_opc(CPUState *cs,
                                 const TranslationBlock *tb,
                                 const uint64_t *data)
 {
-    SPARCCPU *cpu = SPARC_CPU(cs);
-    CPUSPARCState *env = &cpu->env;
+    CPUSPARCState *env = cpu_env(cs);
     target_ulong pc = data[0];
     target_ulong npc = data[1];