diff mbox series

[v10,14/27] KVM: x86: Initialize kvm_caps.supported_xss

Message ID	20240219074733.122080-15-weijiang.yang@intel.com (mailing list archive)
State	New, archived
Headers	show Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A39B42D627; Mon, 19 Feb 2024 07:47:51 +0000 (UTC) From: Yang Weijiang <weijiang.yang@intel.com> To: seanjc@google.com, pbonzini@redhat.com, dave.hansen@intel.com, x86@kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: peterz@infradead.org, chao.gao@intel.com, rick.p.edgecombe@intel.com, mlevitsk@redhat.com, john.allen@amd.com, weijiang.yang@intel.com Subject: [PATCH v10 14/27] KVM: x86: Initialize kvm_caps.supported_xss Date: Sun, 18 Feb 2024 23:47:20 -0800 Message-ID: <20240219074733.122080-15-weijiang.yang@intel.com> In-Reply-To: <20240219074733.122080-1-weijiang.yang@intel.com> References: <20240219074733.122080-1-weijiang.yang@intel.com> Precedence: bulk MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	Enable CET Virtualization \| expand [v10,00/27] Enable CET Virtualization [v10,01/27] x86/fpu/xstate: Always preserve non-user xfeatures/flags in __state_perm [v10,02/27] x86/fpu/xstate: Refine CET user xstate bit enabling [v10,03/27] x86/fpu/xstate: Add CET supervisor mode state support [v10,04/27] x86/fpu/xstate: Introduce XFEATURE_MASK_KERNEL_DYNAMIC xfeature set [v10,05/27] x86/fpu/xstate: Introduce fpu_guest_cfg for guest FPU configuration [v10,06/27] x86/fpu/xstate: Create guest fpstate with guest specific config [v10,07/27] x86/fpu/xstate: Warn if kernel dynamic xfeatures detected in normal fpstate [v10,08/27] KVM: x86: Rework cpuid_get_supported_xcr0() to operate on vCPU data [v10,09/27] KVM: x86: Rename kvm_{g,s}et_msr()* to menifest emulation operations [v10,10/27] KVM: x86: Refine xsave-managed guest register/MSR reset handling [v10,11/27] KVM: x86: Add kvm_msr_{read,write}() helpers [v10,12/27] KVM: x86: Report XSS as to-be-saved if there are supported features [v10,13/27] KVM: x86: Refresh CPUID on write to guest MSR_IA32_XSS [v10,14/27] KVM: x86: Initialize kvm_caps.supported_xss [v10,15/27] KVM: x86: Load guest FPU state when access XSAVE-managed MSRs [v10,16/27] KVM: x86: Add fault checks for guest CR4.CET setting [v10,17/27] KVM: x86: Report KVM supported CET MSRs as to-be-saved [v10,18/27] KVM: VMX: Introduce CET VMCS fields and control bits [v10,19/27] KVM: x86: Use KVM-governed feature framework to track "SHSTK/IBT enabled" [v10,20/27] KVM: VMX: Emulate read and write to CET MSRs [v10,21/27] KVM: x86: Save and reload SSP to/from SMRAM [v10,22/27] KVM: VMX: Set up interception for CET MSRs [v10,23/27] KVM: VMX: Set host constant supervisor states to VMCS fields [v10,24/27] KVM: x86: Enable CET virtualization for VMX and advertise to userspace [v10,25/27] KVM: nVMX: Introduce new VMX_BASIC bit for event error_code delivery to L1 [v10,26/27] KVM: nVMX: Enable CET support for nested guest [v10,27/27] KVM: x86: Don't emulate instructions guarded by CET

Commit Message

Yang, Weijiang Feb. 19, 2024, 7:47 a.m. UTC

Set original kvm_caps.supported_xss to (host_xss & KVM_SUPPORTED_XSS) if
XSAVES is supported. host_xss contains the host supported xstate feature
bits for thread FPU context switch, KVM_SUPPORTED_XSS includes all KVM
enabled XSS feature bits, the resulting value represents the supervisor
xstates that are available to guest and are backed by host FPU framework
for swapping {guest,host} XSAVE-managed registers/MSRs.

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Chao Gao <chao.gao@intel.com>
---
 arch/x86/kvm/x86.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff mbox series

Patch

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index b502d68a2576..60b574fc04d1 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -226,6 +226,8 @@  static struct kvm_user_return_msrs __percpu *user_return_msrs;
 				| XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 				| XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
 
+#define KVM_SUPPORTED_XSS     0
+
 u64 __read_mostly host_efer;
 EXPORT_SYMBOL_GPL(host_efer);
 
@@ -9737,12 +9739,13 @@  int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops)
 		host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
 		kvm_caps.supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
 	}
+	if (boot_cpu_has(X86_FEATURE_XSAVES)) {
+		rdmsrl(MSR_IA32_XSS, host_xss);
+		kvm_caps.supported_xss = host_xss & KVM_SUPPORTED_XSS;
+	}
 
 	rdmsrl_safe(MSR_EFER, &host_efer);
 
-	if (boot_cpu_has(X86_FEATURE_XSAVES))
-		rdmsrl(MSR_IA32_XSS, host_xss);
-
 	kvm_init_pmu_capability(ops->pmu_ops);
 
 	if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))