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Peter Anvin" Subject: [RFC PATCH 68/73] x86/pvm: Implement irq related PVOPS Date: Mon, 26 Feb 2024 22:36:25 +0800 Message-Id: <20240226143630.33643-69-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20240226143630.33643-1-jiangshanlai@gmail.com> References: <20240226143630.33643-1-jiangshanlai@gmail.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lai Jiangshan The save_fl(), irq_enable(), and irq_disable() functions are in the hot path, so the hypervisor shares the X86_EFLAG_IF status in the PVCS structure for the guest kernel. This allows it to be read and modified directly without a VM exit if there is no IRQ window request. Additionally, the irq_halt() function remains the same, and a hypercall is used in its PVOPS to enhance performance. Signed-off-by: Lai Jiangshan Signed-off-by: Hou Wenlong --- arch/x86/entry/entry_64_pvm.S | 22 ++++++++++++++++++++++ arch/x86/include/asm/pvm_para.h | 3 +++ arch/x86/kernel/pvm.c | 10 ++++++++++ 3 files changed, 35 insertions(+) diff --git a/arch/x86/entry/entry_64_pvm.S b/arch/x86/entry/entry_64_pvm.S index abb57e251e73..1d17bac2909a 100644 --- a/arch/x86/entry/entry_64_pvm.S +++ b/arch/x86/entry/entry_64_pvm.S @@ -65,6 +65,28 @@ SYM_FUNC_START(pvm_hypercall) popq %r11 RET SYM_FUNC_END(pvm_hypercall) + +SYM_FUNC_START(pvm_save_fl) + movq PER_CPU_VAR(pvm_vcpu_struct + PVCS_event_flags), %rax + RET +SYM_FUNC_END(pvm_save_fl) + +SYM_FUNC_START(pvm_irq_disable) + btrq $X86_EFLAGS_IF_BIT, PER_CPU_VAR(pvm_vcpu_struct + PVCS_event_flags) + RET +SYM_FUNC_END(pvm_irq_disable) + +SYM_FUNC_START(pvm_irq_enable) + /* set X86_EFLAGS_IF */ + orq $X86_EFLAGS_IF, PER_CPU_VAR(pvm_vcpu_struct + PVCS_event_flags) + btq $PVM_EVENT_FLAGS_IP_BIT, PER_CPU_VAR(pvm_vcpu_struct + PVCS_event_flags) + jc .L_maybe_interrupt_pending + RET +.L_maybe_interrupt_pending: + /* handle pending IRQ */ + movq $PVM_HC_IRQ_WIN, %rax + jmp pvm_hypercall +SYM_FUNC_END(pvm_irq_enable) .popsection /* diff --git a/arch/x86/include/asm/pvm_para.h b/arch/x86/include/asm/pvm_para.h index f5d40a57c423..9484a1a23568 100644 --- a/arch/x86/include/asm/pvm_para.h +++ b/arch/x86/include/asm/pvm_para.h @@ -95,6 +95,9 @@ void pvm_user_event_entry(void); void pvm_hypercall(void); void pvm_retu_rip(void); void pvm_rets_rip(void); +void pvm_save_fl(void); +void pvm_irq_disable(void); +void pvm_irq_enable(void); #endif /* !__ASSEMBLY__ */ #endif /* _ASM_X86_PVM_PARA_H */ diff --git a/arch/x86/kernel/pvm.c b/arch/x86/kernel/pvm.c index 12a35bef9bb8..b4522947374d 100644 --- a/arch/x86/kernel/pvm.c +++ b/arch/x86/kernel/pvm.c @@ -148,6 +148,11 @@ static void pvm_load_tls(struct thread_struct *t, unsigned int cpu) } } +static noinstr void pvm_safe_halt(void) +{ + pvm_hypercall0(PVM_HC_IRQ_HALT); +} + void __init pvm_early_event(struct pt_regs *regs) { int vector = regs->orig_ax >> 32; @@ -387,6 +392,11 @@ void __init pvm_early_setup(void) pv_ops.cpu.write_msr_safe = pvm_write_msr_safe; pv_ops.cpu.load_tls = pvm_load_tls; + pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(pvm_save_fl); + pv_ops.irq.irq_disable = __PV_IS_CALLEE_SAVE(pvm_irq_disable); + pv_ops.irq.irq_enable = __PV_IS_CALLEE_SAVE(pvm_irq_enable); + pv_ops.irq.safe_halt = pvm_safe_halt; + wrmsrl(MSR_PVM_VCPU_STRUCT, __pa(this_cpu_ptr(&pvm_vcpu_struct))); wrmsrl(MSR_PVM_EVENT_ENTRY, (unsigned long)(void *)pvm_early_kernel_event_entry - 256); wrmsrl(MSR_PVM_SUPERVISOR_REDZONE, PVM_SUPERVISOR_REDZONE_SIZE);