diff mbox series

[kvm-unit-tests,RFC,07/13] x86 AMD SEV-ES: Set GHCB page attributes for a new page table

Message ID 20240419125759.242870-8-papaluri@amd.com (mailing list archive)
State New, archived
Headers show
Series Introduce SEV-SNP Support | expand

Commit Message

Paluri, PavanKumar April 19, 2024, 12:57 p.m. UTC 
SEV-ES/SNP guest uses GHCB page to communicate with the host. Such a
page should remain unencrypted (its C-bit should be unset in the guest page
table). Therefore, call setup_ghcb_pte() in the path of setup_vm() to ensure
C-bit of GHCB's pte is unset, for a new page table that will be setup as
a part of page allocation for UEFI-based SEV-ES/SNP tests later on.

Signed-off-by: Pavan Kumar Paluri <papaluri@amd.com>
---
 lib/x86/vm.c | 6 ++++++
 1 file changed, 6 insertions(+)
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Patch

diff --git a/lib/x86/vm.c b/lib/x86/vm.c
index 90f73fbb2dfd..ce2063aee75d 100644
--- a/lib/x86/vm.c
+++ b/lib/x86/vm.c
@@ -3,6 +3,7 @@ 
 #include "vmalloc.h"
 #include "alloc_page.h"
 #include "smp.h"
+#include "amd_sev.h"
 
 static pteval_t pte_opt_mask;
 
@@ -197,6 +198,11 @@  void *setup_mmu(phys_addr_t end_of_memory, void *opt_mask)
     init_alloc_vpage((void*)(3ul << 30));
 #endif
 
+#ifdef CONFIG_EFI
+	if (amd_sev_es_enabled())
+		setup_ghcb_pte(cr3);
+#endif
+
     write_cr3(virt_to_phys(cr3));
 #ifndef __x86_64__
     write_cr4(X86_CR4_PSE);