From patchwork Fri Apr 26 10:07:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13644488 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F0141422C6 for ; Fri, 26 Apr 2024 09:53:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714125207; cv=none; b=IpwUNxPGsIAjYfhVJ1F128ahQQ3cEU3XxkEuMPgvsMCUo24GXV/OZEYZPycrrbXnrFqxmqkMZLP1PjiPJpnxjitiS9+sU62A1ko1v+RI9YTyzbx7OM7MfNPpzY+MPsH715GXKR53bDWFs4GX2ZPWEZIZLiH3n69bpKF4OOUncEo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714125207; c=relaxed/simple; bh=b/2fbk4NjCLRbPp4FCHnEpCvn097YoF5sMd0TPtoTpc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=iTev2KyF02EnctrAFyG7crndz4kSPukAftcU07JpVGwP5dWOJ+ANRUA9XiR+VvBnRohI5t/NONmEQMD99tMF7H7Wdh/hEuwUm/p0LMDmubGLHSO6ZuNRAJ8EsrL5wSB6BwYanUnzr8v6u7pD8O1/Pme99MghLOEWCVlNgLCEnBo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=X1nFc0RT; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="X1nFc0RT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714125207; x=1745661207; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=b/2fbk4NjCLRbPp4FCHnEpCvn097YoF5sMd0TPtoTpc=; b=X1nFc0RTDxshiC7Qd2lVL6qgRf/vwrpb1a6jQMErM+e9Ly183XFTDonJ EOBqZM7gfUSUIQ0Dkp+85l1g3IE/VPQAm7rM90Pf5yF8k2OBaoPPyfjC+ WIgdA/CgiITCubVC+FX8Xg7qkgMzzOA+Zv5sO5/LgMyfJVrQxD11Ute+e z0zgUAu9IEoKPq2AAfGNikxxLWrgXjBWSJV1aXvj1n96sfphjrDvxcYyM yhSFehSukvLG44u7jT9I4YtXo6OROoHxmK5CbPjwCWqPJzAA6UZ11vGww 2yZAybiCJfWvdL4V6W8n9i52rIljmcoRZxBCS/bqLJZ0faz4W8zZl4Cci A==; X-CSE-ConnectionGUID: Pikwjt23QDSS3z3cW/cJdA== X-CSE-MsgGUID: 5fYqd0v9RrajoBfu9QfM8g== X-IronPort-AV: E=McAfee;i="6600,9927,11055"; a="9707426" X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="9707426" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2024 02:53:26 -0700 X-CSE-ConnectionGUID: bMUxhFVuRu2k6Qf4yuqELw== X-CSE-MsgGUID: rkzpwcHwTVeT3V9LySYMlQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="25412335" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa008.fm.intel.com with ESMTP; 26 Apr 2024 02:53:24 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH 4/6] target/i386/kvm: Save/load MSRs of new kvmclock (KVM_FEATURE_CLOCKSOURCE2) Date: Fri, 26 Apr 2024 18:07:14 +0800 Message-Id: <20240426100716.2111688-6-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240426100716.2111688-1-zhao1.liu@intel.com> References: <20240426100716.2111688-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 MSR_KVM_SYSTEM_TIME_NEW and MSR_KVM_WALL_CLOCK_NEW are bound to new kvmclock (KVM_FEATURE_CLOCKSOURCE2). Add the save/load support for these 2 MSRs. Signed-off-by: Zhao Liu --- target/i386/cpu.h | 2 ++ target/i386/kvm/kvm.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index caa32a91346b..c5cf7734b202 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1741,6 +1741,8 @@ typedef struct CPUArchState { uint64_t system_time_msr; uint64_t wall_clock_msr; + uint64_t system_time_new_msr; + uint64_t wall_clock_new_msr; uint64_t steal_time_msr; uint64_t async_pf_en_msr; uint64_t async_pf_int_msr; diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 75d2091c4f8c..ee0767e8f501 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3376,6 +3376,12 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); } + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK2) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME_NEW, + env->system_time_new_msr); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK_NEW, + env->wall_clock_new_msr); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } @@ -3843,6 +3849,10 @@ static int kvm_get_msrs(X86CPU *cpu) kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); } + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK2) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME_NEW, 0); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK_NEW, 0); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } @@ -4082,6 +4092,12 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_KVM_WALL_CLOCK: env->wall_clock_msr = msrs[i].data; break; + case MSR_KVM_SYSTEM_TIME_NEW: + env->system_time_new_msr = msrs[i].data; + break; + case MSR_KVM_WALL_CLOCK_NEW: + env->wall_clock_new_msr = msrs[i].data; + break; case MSR_MCG_STATUS: env->mcg_status = msrs[i].data; break;