Message ID | 20240506053020.3911940-9-mizhang@google.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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AJvYcCWRe479+PG2UbUverIqGGtKGGl+DE3GWcYKFAknvQSZPVkFK6OQ4x8bvF+bXboWf97Cepylb0dEeeytOrpf88xKiMm+ X-Gm-Message-State: AOJu0YyMSpUwTWlNhiLMnUN6b4nv4GGDrSPScHr3rgk8gkdCkthUVWLv qP2tB7Z/JD3EL5HYV8lLNfFDzX20f3pDNI+qhaIMXV+ubNOss1dKCvNw7TDwC0nHSEsPyuK3bXP qa+kzQA== X-Google-Smtp-Source: AGHT+IGyFB0RtQesKy95nA4gxkykHi1rIRqPkz0y9xzm3NAuAEK6vcV+5of6I0ib0fIEygudiZ0jd6x/brX1 X-Received: from mizhang-super.c.googlers.com ([34.105.13.176]) (user=mizhang job=sendgmr) by 2002:a17:902:ecc7:b0:1e2:118f:e587 with SMTP id a7-20020a170902ecc700b001e2118fe587mr398273plh.13.1714973441753; Sun, 05 May 2024 22:30:41 -0700 (PDT) Reply-To: Mingwei Zhang <mizhang@google.com> Date: Mon, 6 May 2024 05:29:33 +0000 In-Reply-To: <20240506053020.3911940-1-mizhang@google.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: <kvm.vger.kernel.org> List-Subscribe: <mailto:kvm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:kvm+unsubscribe@vger.kernel.org> Mime-Version: 1.0 References: <20240506053020.3911940-1-mizhang@google.com> X-Mailer: git-send-email 2.45.0.rc1.225.g2a3ae87e7f-goog Message-ID: <20240506053020.3911940-9-mizhang@google.com> Subject: [PATCH v2 08/54] perf/x86/intel: Support PERF_PMU_CAP_PASSTHROUGH_VPMU From: Mingwei Zhang <mizhang@google.com> To: Sean Christopherson <seanjc@google.com>, Paolo Bonzini <pbonzini@redhat.com>, Xiong Zhang <xiong.y.zhang@intel.com>, Dapeng Mi <dapeng1.mi@linux.intel.com>, Kan Liang <kan.liang@intel.com>, Zhenyu Wang <zhenyuw@linux.intel.com>, Manali Shukla <manali.shukla@amd.com>, Sandipan Das <sandipan.das@amd.com> Cc: Jim Mattson <jmattson@google.com>, Stephane Eranian <eranian@google.com>, Ian Rogers <irogers@google.com>, Namhyung Kim <namhyung@kernel.org>, Mingwei Zhang <mizhang@google.com>, gce-passthrou-pmu-dev@google.com, Samantha Alt <samantha.alt@intel.com>, Zhiyuan Lv <zhiyuan.lv@intel.com>, Yanfei Xu <yanfei.xu@intel.com>, maobibo <maobibo@loongson.cn>, Like Xu <like.xu.linux@gmail.com>, Peter Zijlstra <peterz@infradead.org>, kvm@vger.kernel.org, linux-perf-users@vger.kernel.org Content-Type: text/plain; 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Series |
Mediated Passthrough vPMU 2.0 for x86
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diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 768d1414897f..4d8f907a9416 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -4743,6 +4743,8 @@ static void intel_pmu_check_hybrid_pmus(struct x86_hybrid_pmu *pmu) else pmu->pmu.capabilities &= ~PERF_PMU_CAP_AUX_OUTPUT; + pmu->pmu.capabilities |= PERF_PMU_CAP_PASSTHROUGH_VPMU; + intel_pmu_check_event_constraints(pmu->event_constraints, pmu->num_counters, pmu->num_counters_fixed, @@ -6242,6 +6244,9 @@ __init int intel_pmu_init(void) pr_cont(" AnyThread deprecated, "); } + /* The perf side of core PMU is ready to support the passthrough vPMU. */ + x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_PASSTHROUGH_VPMU; + /* * Install the hw-cache-events table: */