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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN1PEPF00004686.mail.protection.outlook.com (10.167.243.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7611.14 via Frontend Transport; Thu, 23 May 2024 12:19:16 +0000 Received: from BLR-L-RBANGORI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 23 May 2024 07:19:09 -0500 From: Ravi Bangoria To: , , CC: , , , , , , , , , , , , Subject: [PATCH v3 2/3] KVM: SEV-ES: Disallow SEV-ES guests when X86_FEATURE_LBRV is absent Date: Thu, 23 May 2024 12:18:27 +0000 Message-ID: <20240523121828.808-3-ravi.bangoria@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240523121828.808-1-ravi.bangoria@amd.com> References: <20240523121828.808-1-ravi.bangoria@amd.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00004686:EE_|SJ1PR12MB6124:EE_ X-MS-Office365-Filtering-Correlation-Id: 1cad37e0-f133-4d52-907c-08dc7b229067 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|1800799015|82310400017|7416005|376005|36860700004; X-Microsoft-Antispam-Message-Info: XEd2TGSAmVJ5KD+xhKrJErb6dB62kypi/q0pHCZ+7UBgPJv+P2R8x2I20SIrBVXGXfMW3r+/knztPDYt5NN2GLGQmDe6ZwGHfoJYRAZRaMR4cxIXKdCLRoB4sI6fKhgrqTeZt2OC0ogo7hnJsqK4CiBglJ9LYcFbQ83BqZC/Loat+zkUV3xbcpPZ71sGiw1dU3WuQScn1sQb1+5Q+6dqvEuTHMdCMp+Tq6oso5l/V8muYg05AuiP366uHRFSYVZzjwQBzRKAT7f2OSYw2M/fibhzsIU/Jq/xSY6efkj2BCfkTPJeYYfekrdkyla8NnJ3yMmEiljif3070cFBPC2hfd7l+8xlHG8y8uhxVCwRUpSHV8nQoWOArZR4iWYlZwhQcFP9GzLJ20ikkDoQnMSTcjgpTFI50VG48/5JYgauZNv14VUwno/B5gmKf4vHUEFtSrwI3S516G/muEuaw7M6e1gh3YCWJe0cQlJN4z3AIczgNO1hp4+9iYzdb0XoDUE/moHgZ444yRwk68lcBUI72vU42UZdzAqo+uBmW25sdpDF1B22nG78n/6Dqjk9CtaCbKZ5+TxQK8E3ZJJ0+4m89VTO7f/ZNtazTK6qC/dVd7esohtk2L+lBPVPbDgSvh1SRkRlf0qcYKt1obBSvifnhhSpVRxFryGpVMjP5TszxZ3At6PST/zzUEdM4kB9f4GZQGaFqEQXp+4FtMOx++6OOO6TyTBgBqX0UKAdu5mGmc0ClkUobuiCrtcsyLsSManox5ERbhkZu2wZWpvsxGIOsWTFZvjfL9voDsdqQSiU+hhIq1YI2TTmDLi1TT8gzXwC6ePji5+6KVOAGPU5DZ1kPQTJZ4K/RsttqIy8aYypQ3v0v8Fw161HXgFYqNoJs84ZHUGwoKaMvg2U6es6Kn6x0uSmyV6TzyvCJMG65leFRFCiJh+uTN1IVIIwDrvmOCHPYOW42dndymesQECPryjKxe6Qy2LG/ulRmtJ03FFerzD0RDxA+8YlKSgGnZDQJLHW5VQDnnh1c7W1OVB4Jo+4I3N3uH0+c5ah3tXjfNOzNnK3GCKxcyBzDUMiCA+cWOTUieLDvt7Z+fE+VZyGThhF5wyfTwwwJcGvXagpcx36TN1Ia7mc1UbwhnpWeC9K1/I735jr+XUEW3IOvoM/RqLYLF87tPfhcSHFGR2DFHqTQHIIlJKI3JBit4pbuagcrw7SlXKZDjRHMkMcA97FwUPqnKqQeftlah/BAvCWNBZoSXnEMudTG5cqFI99RHJgvIaVUWlZszNtFHeYKSuFkDxgC4DO6/IKE7rgkL/x8a2tzddyiveikXPUClnh5As9YSDQ X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(1800799015)(82310400017)(7416005)(376005)(36860700004);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 May 2024 12:19:16.0484 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1cad37e0-f133-4d52-907c-08dc7b229067 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004686.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6124 As documented in APM[1], LBR Virtualization must be enabled for SEV-ES guests. So, prevent SEV-ES guests when LBRV support is missing. [1]: AMD64 Architecture Programmer's Manual Pub. 40332, Rev. 4.07 - June 2023, Vol 2, 15.35.2 Enabling SEV-ES. https://bugzilla.kernel.org/attachment.cgi?id=304653 Fixes: 376c6d285017 ("KVM: SVM: Provide support for SEV-ES vCPU creation/loading") Signed-off-by: Ravi Bangoria --- arch/x86/kvm/svm/sev.c | 8 +++++++- arch/x86/kvm/svm/svm.c | 16 +++++++--------- arch/x86/kvm/svm/svm.h | 4 ++-- 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 176ba117413a..1a2bde579727 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -2856,7 +2856,7 @@ void __init sev_set_cpu_caps(void) } } -void __init sev_hardware_setup(void) +void __init sev_hardware_setup(int lbrv) { unsigned int eax, ebx, ecx, edx, sev_asid_count, sev_es_asid_count; bool sev_snp_supported = false; @@ -2933,6 +2933,12 @@ void __init sev_hardware_setup(void) if (!boot_cpu_has(X86_FEATURE_SEV_ES)) goto out; + if (!lbrv) { + WARN_ONCE(!boot_cpu_has(X86_FEATURE_LBRV), + "LBRV must be present for SEV-ES support"); + goto out; + } + /* Has the system been allocated ASIDs for SEV-ES? */ if (min_sev_asid == 1) goto out; diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 489b0183f37d..dcb5eb00a4f5 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -5308,11 +5308,17 @@ static __init int svm_hardware_setup(void) nrips = nrips && boot_cpu_has(X86_FEATURE_NRIPS); + if (lbrv) { + if (!boot_cpu_has(X86_FEATURE_LBRV)) + lbrv = false; + else + pr_info("LBR virtualization supported\n"); + } /* * Note, SEV setup consumes npt_enabled and enable_mmio_caching (which * may be modified by svm_adjust_mmio_mask()), as well as nrips. */ - sev_hardware_setup(); + sev_hardware_setup(lbrv); svm_hv_hardware_setup(); @@ -5361,14 +5367,6 @@ static __init int svm_hardware_setup(void) svm_x86_ops.set_vnmi_pending = NULL; } - - if (lbrv) { - if (!boot_cpu_has(X86_FEATURE_LBRV)) - lbrv = false; - else - pr_info("LBR virtualization supported\n"); - } - if (!enable_pmu) pr_info("PMU virtualization is disabled\n"); diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index 555c55f50298..2d7fd09c08c9 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -728,7 +728,7 @@ struct page *snp_safe_alloc_page(struct kvm_vcpu *vcpu); void sev_free_vcpu(struct kvm_vcpu *vcpu); void sev_vm_destroy(struct kvm *kvm); void __init sev_set_cpu_caps(void); -void __init sev_hardware_setup(void); +void __init sev_hardware_setup(int lbrv); void sev_hardware_unsetup(void); int sev_cpu_init(struct svm_cpu_data *sd); int sev_dev_get_attr(u32 group, u64 attr, u64 *val); @@ -747,7 +747,7 @@ static inline struct page *snp_safe_alloc_page(struct kvm_vcpu *vcpu) { static inline void sev_free_vcpu(struct kvm_vcpu *vcpu) {} static inline void sev_vm_destroy(struct kvm *kvm) {} static inline void __init sev_set_cpu_caps(void) {} -static inline void __init sev_hardware_setup(void) {} +static inline void __init sev_hardware_setup(int lbrv) {} static inline void sev_hardware_unsetup(void) {} static inline int sev_cpu_init(struct svm_cpu_data *sd) { return 0; } static inline int sev_dev_get_attr(u32 group, u64 attr, u64 *val) { return -ENXIO; }