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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DS3PEPF000099D4.mail.protection.outlook.com (10.167.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7633.15 via Frontend Transport; Fri, 31 May 2024 04:35:25 +0000 Received: from gomati.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 May 2024 23:34:54 -0500 From: Nikunj A Dadhania To: , , , , CC: , , , , , , Subject: [PATCH v9 23/24] x86/cpu/amd: Do not print FW_BUG for Secure TSC Date: Fri, 31 May 2024 10:00:37 +0530 Message-ID: <20240531043038.3370793-24-nikunj@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240531043038.3370793-1-nikunj@amd.com> References: <20240531043038.3370793-1-nikunj@amd.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099D4:EE_|MW6PR12MB8949:EE_ X-MS-Office365-Filtering-Correlation-Id: a1bda054-1237-4f32-9299-08dc812b179f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|7416005|82310400017|36860700004|1800799015|376005; X-Microsoft-Antispam-Message-Info: 5RS8HSc2E/OCDat6Rx92pHUuBgv/kMmsGmELsphdOqEnygsQaGBPgy9MTUOYDY61ZMVrLnQayJa2gl3G5S+B7r4390eACezyIH7qJJBV6JIlfk7dzVcuIO8bTvDy6z4HtJ5uUMeN8VnUA7vLt1GIKBk+b3JTKD9R4ZtmVuH8ydbo0NxXIJ+sW5Tn3jdwof1ZsKwVYAftRTVJz8TSvb6HUNs3zTzQG5OivZ0GYfGTSrhWfHshsCwBtwhkBC0a3VJ+P1gdUmzVgZC7lcfqN4oXb3SOyGtqufEca5i42aTZnvpw7mLfq+VDnRTF6uewnVTxTD16TGEecAE+qWKnVmnz+EPTzzya+fZDp9vErVBcq5260DodOygzzxnPkIS4RkAzBAm4j6Hn+Urv7X2GHFJ2ht5QMXOS6UcpqvyGe2C9GItYIllUmyNU35UuK4XMVg6/nNeVPt2A59NuLO9uufCXNfC+iydUTwug0dXRN49crvMRuh7DFiwToiH5XAefeaGDHnmb1KbucrqTAQvA1t6p7zrg/GRO7rCgcTatlZ08zZHgB89vKqbAB7UX/1xAOkulhlcTc+NDbTWHLzNT4cP0CNocZU7TwXgimnfu8mGWq87D4umnQzrnpRCYO0hmIW6UUgayXaXXORrXafRIGVUt6c1XIC0DcAWsNqJEjWBBlcSdUaffGmXdElM1tJZJyirTsbyuSwHdnUVCuwGFieXIzWN27f5Naa8Ae4z5amD7akaoUblFzaF65M7fClrOlsxSmrxYIDPlchnuPQQGkVTUcADnOi1AwNWdbKMjQIM0VXXmxwfzahfQdc6KMq7B/klc8Gb0JCA2srQJIlgrBjzEbusA7d+CCCL8aX3T/0u/xhuuu5rqfYlGixPdqJb1hAa3umPCPinrYdzckOIXq208OYW2IXz1KKhMtaHxBEyj8sXzmCk8ALOWObwVAwZs0Fz89io5x3RhYG5fjTjMAXbTWo4/26Crs6VxMvXoAfkNPJ5HdClXDBnOwCE69Il1mlwio5E/DE/YxacXMIYkmV9mi0dXP5raFrCUcIiHQ8UYXVmPVPzpoqC8uPAsNcOUlns5I6SMKH75CkaOJxyEGqlfVAgQz6h6gFj9P7y+Ici5jIj4XmYF8x1twDOAYi8aRDsD2zvrpMwLYmwq2/lNUZyBY7T7i8WUFlwcYRS28j/FAo5061TTXnEp58hxzueq2WfZ8sox6EmAtN/74Xvjp4vEYYvGrh2DNqzH7nNhaRwPXjd6bgKs7YqksMqPeXWGJnBlABn/xF2j90Rs4ocFosIS+T5sraRQDKs1Ky1UboivVFskwse0dWgVvmDY5UKirC4k0Z0iCBYTgNrk9g1MqnIC1zVm9M7Y474ZPhZSbEPeQy7O6/PtGtC9ntiB3J1flJWf X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(7416005)(82310400017)(36860700004)(1800799015)(376005);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 May 2024 04:35:25.8897 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a1bda054-1237-4f32-9299-08dc812b179f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099D4.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB8949 When SecureTSC is enabled and TscInvariant (bit 8) in CPUID_8000_0007_edx is set, kernel complains with the below firmware bug: [Firmware Bug]: TSC doesn't count with P0 frequency! Secure TSC need not run at P0 frequency, the TSC frequency is set by the VMM as part of the SNP_LAUNCH_START command. Avoid the check when Secure TSC is enabled Signed-off-by: Nikunj A Dadhania Tested-by: Peter Gonda --- arch/x86/kernel/cpu/amd.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 44df3f11e731..905e57ca324f 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -370,7 +370,8 @@ static void bsp_determine_snp(struct cpuinfo_x86 *c) static void bsp_init_amd(struct cpuinfo_x86 *c) { - if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) { + if (cpu_has(c, X86_FEATURE_CONSTANT_TSC) && + !cc_platform_has(CC_ATTR_GUEST_SECURE_TSC)) { if (c->x86 > 0x10 || (c->x86 == 0x10 && c->x86_model >= 0x2)) {