| Message ID | 20240614234607.1405974-1-seanjc@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [kvm-unit-tests,GIT,PULL] x86: Fixes, cleanups, and new tests | expand |
On Sat, Jun 15, 2024 at 1:46 AM Sean Christopherson <seanjc@google.com> wrote: > > Please pull a smattering of x86 changes, most of which have been sitting around > on-list for quite some time. There are still quite a few KUT x86 series that > want attention, but they are all quite large and exceeded what little review > time I have for KUT :-/ Pulled, thanks. Paolo > Note, the posted interrupt test fails due to KVM bugs, patches posted: > https://lore.kernel.org/all/20240607172609.3205077-1-seanjc@google.com > > The following changes since commit a68956b3fb6f5f308822b20ce0ff8e02db1f7375: > > gitlab-ci: Always save artifacts (2024-06-05 12:49:58 +0200) > > are available in the Git repository at: > > https://github.com/kvm-x86/kvm-unit-tests.git tags/kvm-x86-2024.06.14 > > for you to fetch changes up to ee1d79c3f0f871bf78f20930cb1a2441f28ac027: > > nVMX: Verify KVM actually loads the value in HOST_PAT into the PAT MSR (2024-06-11 06:41:23 -0700) > > ---------------------------------------------------------------- > x86 fixes, cleanups, and new testcases: > > - Add a testcase to verify that KVM doesn't inject a triple fault (or any > other "error") if a nested VM is run with an EP4TA pointing MMIO. > > - Play nice with CR4.CET in test_vmxon_bad_cr() > > - Force emulation when testing MSR_IA32_FLUSH_CMD to workaround an issue where > Skylake CPUs don't follow the architecturally defined behavior, and so that > the test doesn't break if/when new bits are supported by future CPUs. > > - Rework the async #PF test to support IRQ-based page-ready notifications. > > - Fix a variety of issues related to adaptive PEBS. > > - Add several nested VMX tests for virtual interrupt delivery and posted > interrupts. > > - Ensure PAT is loaded with the default value after the nVMX PAT tests > (failure to do so was causing tests to fail due to all memory being UC). > > - Misc cleanups. > > ---------------------------------------------------------------- > Alejandro Jimenez (1): > x86: vmexit: Allow IPI test to be accelerated by SVM AVIC > > Dan Wu (1): > x86/asyncpf: Update async page fault test for IRQ-based "page ready" > > Jack Wang (1): > x86/msr: Fix typo in output SMR > > Jim Mattson (1): > nVMX: Enable x2APIC mode for virtual-interrupt delivery tests > > Marc Orr (3): > nVMX: test nested "virtual-interrupt delivery" > nVMX: test nested EOI virtualization > nVMX: add self-IPI tests to vmx_basic_vid_test > > Mingwei Zhang (3): > x86: Add FEP support on read/write register instructions > x86: msr: testing MSR_IA32_FLUSH_CMD reserved bits only in KVM emulation > x86/pmu: Clear mask in PMI handler to allow delivering subsequent PMIs > > Oliver Upton (1): > nVMX: add test for posted interrupts > > Sean Christopherson (9): > nVMX: Use helpers to check for WB memtype and 4-level EPT support > nVMX: Use setup_dummy_ept() to configure EPT for test_ept_eptp() test > nVMX: Add a testcase for running L2 with EP4TA that points at MMIO > x86/pmu: Enable PEBS on fixed counters iff baseline PEBS is support > x86/pmu: Iterate over adaptive PEBS flag combinations > x86/pmu: Test adaptive PEBS without any adaptive counters > x86/pmu: Add a PEBS test to verify the host LBRs aren't leaked to the guest > nVMX: Ensure host's PAT is loaded at the end of all VMX tests > nVMX: Verify KVM actually loads the value in HOST_PAT into the PAT MSR > > Yang Weijiang (3): > nVMX: Exclude CR4.CET from the test_vmxon_bad_cr() > nVMX: Rename union vmx_basic and related global variable > nVMX: Introduce new vmx_basic MSR feature bit for vmx tests > > lib/x86/apic.h | 5 + > lib/x86/asm/bitops.h | 8 + > lib/x86/desc.h | 30 +++- > lib/x86/pmu.h | 6 +- > lib/x86/processor.h | 24 ++- > x86/asyncpf.c | 154 ++++++++++------ > x86/msr.c | 23 ++- > x86/pmu.c | 1 + > x86/pmu_pebs.c | 110 +++++++----- > x86/unittests.cfg | 19 +- > x86/vmx.c | 50 +++--- > x86/vmx.h | 7 +- > x86/vmx_tests.c | 497 ++++++++++++++++++++++++++++++++++++++++++++++++--- > 13 files changed, 755 insertions(+), 179 deletions(-) >
Please pull a smattering of x86 changes, most of which have been sitting around on-list for quite some time. There are still quite a few KUT x86 series that want attention, but they are all quite large and exceeded what little review time I have for KUT :-/ Note, the posted interrupt test fails due to KVM bugs, patches posted: https://lore.kernel.org/all/20240607172609.3205077-1-seanjc@google.com The following changes since commit a68956b3fb6f5f308822b20ce0ff8e02db1f7375: gitlab-ci: Always save artifacts (2024-06-05 12:49:58 +0200) are available in the Git repository at: https://github.com/kvm-x86/kvm-unit-tests.git tags/kvm-x86-2024.06.14 for you to fetch changes up to ee1d79c3f0f871bf78f20930cb1a2441f28ac027: nVMX: Verify KVM actually loads the value in HOST_PAT into the PAT MSR (2024-06-11 06:41:23 -0700) ---------------------------------------------------------------- x86 fixes, cleanups, and new testcases: - Add a testcase to verify that KVM doesn't inject a triple fault (or any other "error") if a nested VM is run with an EP4TA pointing MMIO. - Play nice with CR4.CET in test_vmxon_bad_cr() - Force emulation when testing MSR_IA32_FLUSH_CMD to workaround an issue where Skylake CPUs don't follow the architecturally defined behavior, and so that the test doesn't break if/when new bits are supported by future CPUs. - Rework the async #PF test to support IRQ-based page-ready notifications. - Fix a variety of issues related to adaptive PEBS. - Add several nested VMX tests for virtual interrupt delivery and posted interrupts. - Ensure PAT is loaded with the default value after the nVMX PAT tests (failure to do so was causing tests to fail due to all memory being UC). - Misc cleanups. ---------------------------------------------------------------- Alejandro Jimenez (1): x86: vmexit: Allow IPI test to be accelerated by SVM AVIC Dan Wu (1): x86/asyncpf: Update async page fault test for IRQ-based "page ready" Jack Wang (1): x86/msr: Fix typo in output SMR Jim Mattson (1): nVMX: Enable x2APIC mode for virtual-interrupt delivery tests Marc Orr (3): nVMX: test nested "virtual-interrupt delivery" nVMX: test nested EOI virtualization nVMX: add self-IPI tests to vmx_basic_vid_test Mingwei Zhang (3): x86: Add FEP support on read/write register instructions x86: msr: testing MSR_IA32_FLUSH_CMD reserved bits only in KVM emulation x86/pmu: Clear mask in PMI handler to allow delivering subsequent PMIs Oliver Upton (1): nVMX: add test for posted interrupts Sean Christopherson (9): nVMX: Use helpers to check for WB memtype and 4-level EPT support nVMX: Use setup_dummy_ept() to configure EPT for test_ept_eptp() test nVMX: Add a testcase for running L2 with EP4TA that points at MMIO x86/pmu: Enable PEBS on fixed counters iff baseline PEBS is support x86/pmu: Iterate over adaptive PEBS flag combinations x86/pmu: Test adaptive PEBS without any adaptive counters x86/pmu: Add a PEBS test to verify the host LBRs aren't leaked to the guest nVMX: Ensure host's PAT is loaded at the end of all VMX tests nVMX: Verify KVM actually loads the value in HOST_PAT into the PAT MSR Yang Weijiang (3): nVMX: Exclude CR4.CET from the test_vmxon_bad_cr() nVMX: Rename union vmx_basic and related global variable nVMX: Introduce new vmx_basic MSR feature bit for vmx tests lib/x86/apic.h | 5 + lib/x86/asm/bitops.h | 8 + lib/x86/desc.h | 30 +++- lib/x86/pmu.h | 6 +- lib/x86/processor.h | 24 ++- x86/asyncpf.c | 154 ++++++++++------ x86/msr.c | 23 ++- x86/pmu.c | 1 + x86/pmu_pebs.c | 110 +++++++----- x86/unittests.cfg | 19 +- x86/vmx.c | 50 +++--- x86/vmx.h | 7 +- x86/vmx_tests.c | 497 ++++++++++++++++++++++++++++++++++++++++++++++++--- 13 files changed, 755 insertions(+), 179 deletions(-)