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Fri, 28 Jun 2024 00:52:06 -0700 (PDT) From: Atish Patra Date: Fri, 28 Jun 2024 00:51:42 -0700 Subject: [PATCH v4 2/3] drivers/perf: riscv: Reset the counter to hpmevent mapping while starting cpus Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240628-misc_perf_fixes-v4-2-e01cfddcf035@rivosinc.com> References: <20240628-misc_perf_fixes-v4-0-e01cfddcf035@rivosinc.com> In-Reply-To: <20240628-misc_perf_fixes-v4-0-e01cfddcf035@rivosinc.com> To: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Will Deacon , Mark Rutland , Paul Walmsley , Palmer Dabbelt , Andrew Jones , Conor Dooley , Samuel Holland , Palmer Dabbelt , Alexandre Ghiti , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Atish Patra X-Mailer: b4 0.15-dev-13183 From: Samuel Holland Currently, we stop all the counters while a new cpu is brought online. However, the hpmevent to counter mappings are not reset. The firmware may have some stale encoding in their mapping structure which may lead to undesirable results. We have not encountered such scenario though. Signed-off-by: Samuel Holland Signed-off-by: Atish Patra --- drivers/perf/riscv_pmu_sbi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index a2e4005e1fd0..94bc369a3454 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -762,7 +762,7 @@ static inline void pmu_sbi_stop_all(struct riscv_pmu *pmu) * which may include counters that are not enabled yet. */ sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, - 0, pmu->cmask, 0, 0, 0, 0); + 0, pmu->cmask, SBI_PMU_STOP_FLAG_RESET, 0, 0, 0); } static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu)