diff mbox series

[v11,17/20] x86/sev: Allow Secure TSC feature for SNP guests

Message ID 20240731150811.156771-18-nikunj@amd.com (mailing list archive)
State New, archived
Headers show
Series Add Secure TSC support for SNP guests | expand

Commit Message

Nikunj A. Dadhania July 31, 2024, 3:08 p.m. UTC
Now that all the required plumbing is done for enabling SNP Secure TSC
feature, add Secure TSC to SNP features present list.

Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
Tested-by: Peter Gonda <pgonda@google.com>
---
 arch/x86/boot/compressed/sev.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Tom Lendacky Sept. 13, 2024, 4:53 p.m. UTC | #1
On 7/31/24 10:08, Nikunj A Dadhania wrote:
> Now that all the required plumbing is done for enabling SNP Secure TSC
> feature, add Secure TSC to SNP features present list.

So I think this should be the last patch in the series after the TSC is
marked reliable, kvmclock is bypassed, etc. This way everything is in
place when the guest is allowed to run with Secure TSC.

> 
> Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
> Tested-by: Peter Gonda <pgonda@google.com>

Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>

> ---
>  arch/x86/boot/compressed/sev.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c
> index cd44e120fe53..bb55934c1cee 100644
> --- a/arch/x86/boot/compressed/sev.c
> +++ b/arch/x86/boot/compressed/sev.c
> @@ -401,7 +401,8 @@ void do_boot_stage2_vc(struct pt_regs *regs, unsigned long exit_code)
>   * by the guest kernel. As and when a new feature is implemented in the
>   * guest kernel, a corresponding bit should be added to the mask.
>   */
> -#define SNP_FEATURES_PRESENT	MSR_AMD64_SNP_DEBUG_SWAP
> +#define SNP_FEATURES_PRESENT	(MSR_AMD64_SNP_DEBUG_SWAP |	\
> +				 MSR_AMD64_SNP_SECURE_TSC)
>  
>  u64 snp_get_unsupported_features(u64 status)
>  {
Nikunj A. Dadhania Sept. 16, 2024, 6:23 a.m. UTC | #2
On 9/13/2024 10:23 PM, Tom Lendacky wrote:
> On 7/31/24 10:08, Nikunj A Dadhania wrote:
>> Now that all the required plumbing is done for enabling SNP Secure TSC
>> feature, add Secure TSC to SNP features present list.
> 
> So I think this should be the last patch in the series after the TSC is
> marked reliable, kvmclock is bypassed, etc. This way everything is in
> place when the guest is allowed to run with Secure TSC.

Sure, I can re-arrange that. I had re-arranged it in this order so the
TSC related problems are visible after SecureTSC is enabled and fix them.

> 
>>
>> Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
>> Tested-by: Peter Gonda <pgonda@google.com>
> 
> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>

Regards
Nikunj
diff mbox series

Patch

diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c
index cd44e120fe53..bb55934c1cee 100644
--- a/arch/x86/boot/compressed/sev.c
+++ b/arch/x86/boot/compressed/sev.c
@@ -401,7 +401,8 @@  void do_boot_stage2_vc(struct pt_regs *regs, unsigned long exit_code)
  * by the guest kernel. As and when a new feature is implemented in the
  * guest kernel, a corresponding bit should be added to the mask.
  */
-#define SNP_FEATURES_PRESENT	MSR_AMD64_SNP_DEBUG_SWAP
+#define SNP_FEATURES_PRESENT	(MSR_AMD64_SNP_DEBUG_SWAP |	\
+				 MSR_AMD64_SNP_SECURE_TSC)
 
 u64 snp_get_unsupported_features(u64 status)
 {