| Message ID | 20240801045907.4010984-49-mizhang@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Mediated Passthrough vPMU 3.0 for x86 | expand |
On 2024-08-01 12:58 a.m., Mingwei Zhang wrote: > From: Kan Liang <kan.liang@linux.intel.com> > > Apply the PERF_PMU_CAP_PASSTHROUGH_VPMU for Intel core PMU. It only > indicates that the perf side of core PMU is ready to support the > passthrough vPMU. Besides the capability, the hypervisor should still need > to check the PMU version and other capabilities to decide whether to enable > the passthrough vPMU. > > Signed-off-by: Kan Liang <kan.liang@linux.intel.com> > Tested-by: Yongwei Ma <yongwei.ma@intel.com> > Signed-off-by: Mingwei Zhang <mizhang@google.com> > --- > arch/x86/events/intel/core.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c > index 38c1b1f1deaa..d5bb7d4ed062 100644 > --- a/arch/x86/events/intel/core.c > +++ b/arch/x86/events/intel/core.c > @@ -4743,6 +4743,8 @@ static void intel_pmu_check_hybrid_pmus(struct x86_hybrid_pmu *pmu) > else > pmu->pmu.capabilities &= ~PERF_PMU_CAP_AUX_OUTPUT; > > + pmu->pmu.capabilities |= PERF_PMU_CAP_PASSTHROUGH_VPMU; > + Because of the simplification in patch 14, there is only one PASSTHROUGH vPMU supported on a machine. The flag has to be moved for the hybrid PMUs. Otherwise, the hybrid PMUs would not be registered even in the bare metal. > intel_pmu_check_event_constraints(pmu->event_constraints, > pmu->num_counters, > pmu->num_counters_fixed, > @@ -6235,6 +6237,9 @@ __init int intel_pmu_init(void) > pr_cont(" AnyThread deprecated, "); > } > > + /* The perf side of core PMU is ready to support the passthrough vPMU. */ > + x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_PASSTHROUGH_VPMU; > + It's good enough to only set the flag here. Thanks, Kan > /* > * Install the hw-cache-events table: > */
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 38c1b1f1deaa..d5bb7d4ed062 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -4743,6 +4743,8 @@ static void intel_pmu_check_hybrid_pmus(struct x86_hybrid_pmu *pmu) else pmu->pmu.capabilities &= ~PERF_PMU_CAP_AUX_OUTPUT; + pmu->pmu.capabilities |= PERF_PMU_CAP_PASSTHROUGH_VPMU; + intel_pmu_check_event_constraints(pmu->event_constraints, pmu->num_counters, pmu->num_counters_fixed, @@ -6235,6 +6237,9 @@ __init int intel_pmu_init(void) pr_cont(" AnyThread deprecated, "); } + /* The perf side of core PMU is ready to support the passthrough vPMU. */ + x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_PASSTHROUGH_VPMU; + /* * Install the hw-cache-events table: */