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b=Fp7XJAZboBMpW8F8M6c7n9Llq0zSu2y1saEO2/zhhLvfJr1v9NKODCxE0/l7v3dU+l 1p+XGjW75kkfdxPnTWXKUprr+To974gmWshVqOX40dDAmYQPiadZSrPdi0NO0e1kprO9 CIcMFEl03GDlFSDkU+cyGmDJeCQmd8iBSZiEnHbFFrX2FYvQ4Igsq1fY2f+xycker1vn KJDNORdAQd4MWti7KvPy73BPiovlLUCheMFvCHWBQIuz3tZVATo+x9LdQ8bseNTGBDp2 9/dvl30J25UndTmedPmFW9qeTBj29pNlx5hP+rNUKfxq+KktrieTKC3IouYAcexTGT9i OE5Q== X-Forwarded-Encrypted: i=1; AJvYcCWS/LLOvW+CvVytNYTQmY1WnbROt+oar+JHrFAv+1eFHxalXvI5let1fuq6spf46kgKloajXVh10d/Fg7Gt+D/y2o9R X-Gm-Message-State: AOJu0Ywgv2Kq3pnptJ9DzgKG5MNQJwvUSzM3ja2eAF1Zly0l3qml0ijw oCsNpbh/moTWVXVws2QyD39uRQwjAhAqixledHZTf/tk9saxE2zcioqEMFVn0d2l+w86/xMC257 PRnh4wQ== X-Google-Smtp-Source: AGHT+IE0xF0ZWDReclAZ16EiEfEORg6bp7W7nUuzCTTl84dqX0CiNk3QO/0bqT1nO6h5B7MExJodqJcFutLy X-Received: from mizhang-super.c.googlers.com ([34.105.13.176]) (user=mizhang job=sendgmr) by 2002:a05:6a00:9465:b0:706:6a2f:36b0 with SMTP id d2e1a72fcca58-71065e4ef40mr758b3a.2.1722488360754; Wed, 31 Jul 2024 21:59:20 -0700 (PDT) Reply-To: Mingwei Zhang Date: Thu, 1 Aug 2024 04:58:14 +0000 In-Reply-To: <20240801045907.4010984-1-mizhang@google.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240801045907.4010984-1-mizhang@google.com> X-Mailer: git-send-email 2.46.0.rc1.232.g9752f9e123-goog Message-ID: <20240801045907.4010984-6-mizhang@google.com> Subject: [RFC PATCH v3 05/58] x86/msr: Introduce MSR_CORE_PERF_GLOBAL_STATUS_SET From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini , Xiong Zhang , Dapeng Mi , Kan Liang , Zhenyu Wang , Manali Shukla , Sandipan Das Cc: Jim Mattson , Stephane Eranian , Ian Rogers , Namhyung Kim , Mingwei Zhang , gce-passthrou-pmu-dev@google.com, Samantha Alt , Zhiyuan Lv , Yanfei Xu , Like Xu , Peter Zijlstra , Raghavendra Rao Ananta , kvm@vger.kernel.org, linux-perf-users@vger.kernel.org From: Dapeng Mi Add additional PMU MSRs MSR_CORE_PERF_GLOBAL_STATUS_SET to allow passthrough PMU operation on the read-only MSR IA32_PERF_GLOBAL_STATUS. Signed-off-by: Dapeng Mi Signed-off-by: Mingwei Zhang --- arch/x86/include/asm/msr-index.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index b9f8744b47e5..1d7104713926 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1113,6 +1113,7 @@ #define MSR_CORE_PERF_GLOBAL_STATUS 0x0000038e #define MSR_CORE_PERF_GLOBAL_CTRL 0x0000038f #define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x00000390 +#define MSR_CORE_PERF_GLOBAL_STATUS_SET 0x00000391 #define MSR_PERF_METRICS 0x00000329