Message ID | 20240821142610.3297483-4-apatel@ventanamicro.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Series |
Add RISC-V ISA extensions based on Linux-6.10
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expand
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diff --git a/riscv/kvm-cpu.c b/riscv/kvm-cpu.c index ae87848..0c171da 100644 --- a/riscv/kvm-cpu.c +++ b/riscv/kvm-cpu.c @@ -162,6 +162,7 @@ static bool kvm_cpu_riscv_sbi(struct kvm_cpu *vcpu) switch (vcpu->kvm_run->riscv_sbi.function_id) { case SBI_EXT_DBCN_CONSOLE_WRITE: case SBI_EXT_DBCN_CONSOLE_READ: + vcpu->kvm_run->riscv_sbi.ret[0] = SBI_SUCCESS; addr = vcpu->kvm_run->riscv_sbi.args[1]; #if __riscv_xlen == 32 addr |= (u64)vcpu->kvm_run->riscv_sbi.args[2] << 32;