| Message ID | 20240821153844.60084-6-steven.price@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: Support for Arm CCA in KVM | expand |
Hi Steven On 21/08/2024 16:38, Steven Price wrote: > The RMM (Realm Management Monitor) provides functionality that can be > accessed by SMC calls from the host. > > The SMC definitions are based on DEN0137[1] version 1.0-rel0-rc1 > > [1] https://developer.arm.com/-/cdn-downloads/permalink/PDF/Architectures/DEN0137_1.0-rel0-rc1_rmm-arch_external.pdf > The definitions match RMM spec. Some ultra minor comments below, feel free to ignore ;-) > Signed-off-by: Steven Price <steven.price@arm.com> > --- > Changes since v3: > * Update to match RMM spec v1.0-rel0-rc1. > Changes since v2: > * Fix specification link. > * Rename rec_entry->rec_enter to match spec. > * Fix size of pmu_ovf_status to match spec. > --- > arch/arm64/include/asm/rmi_smc.h | 253 +++++++++++++++++++++++++++++++ > 1 file changed, 253 insertions(+) > create mode 100644 arch/arm64/include/asm/rmi_smc.h > > diff --git a/arch/arm64/include/asm/rmi_smc.h b/arch/arm64/include/asm/rmi_smc.h > new file mode 100644 > index 000000000000..5ee71c12a9cd > --- /dev/null > +++ b/arch/arm64/include/asm/rmi_smc.h > @@ -0,0 +1,253 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2023-2024 ARM Ltd. > + * > + * The values and structures in this file are from the Realm Management Monitor > + * specification (DEN0137) version 1.0-rel0-rc1: > + * https://developer.arm.com/-/cdn-downloads/permalink/PDF/Architectures/DEN0137_1.0-rel0-rc1_rmm-arch_external.pdf > + */ > + > +#ifndef __ASM_RME_SMC_H > +#define __ASM_RME_SMC_H > + > +#include <linux/arm-smccc.h> > + > +#define SMC_RxI_CALL(func) \ > + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ > + ARM_SMCCC_SMC_64, \ > + ARM_SMCCC_OWNER_STANDARD, \ > + (func)) > + > +#define SMC_RMI_DATA_CREATE SMC_RxI_CALL(0x0153) > +#define SMC_RMI_DATA_CREATE_UNKNOWN SMC_RxI_CALL(0x0154) > +#define SMC_RMI_DATA_DESTROY SMC_RxI_CALL(0x0155) > +#define SMC_RMI_FEATURES SMC_RxI_CALL(0x0165) > +#define SMC_RMI_GRANULE_DELEGATE SMC_RxI_CALL(0x0151) > +#define SMC_RMI_GRANULE_UNDELEGATE SMC_RxI_CALL(0x0152) > +#define SMC_RMI_PSCI_COMPLETE SMC_RxI_CALL(0x0164) > +#define SMC_RMI_REALM_ACTIVATE SMC_RxI_CALL(0x0157) > +#define SMC_RMI_REALM_CREATE SMC_RxI_CALL(0x0158) > +#define SMC_RMI_REALM_DESTROY SMC_RxI_CALL(0x0159) > +#define SMC_RMI_REC_AUX_COUNT SMC_RxI_CALL(0x0167) > +#define SMC_RMI_REC_CREATE SMC_RxI_CALL(0x015a) > +#define SMC_RMI_REC_DESTROY SMC_RxI_CALL(0x015b) > +#define SMC_RMI_REC_ENTER SMC_RxI_CALL(0x015c) > +#define SMC_RMI_RTT_CREATE SMC_RxI_CALL(0x015d) > +#define SMC_RMI_RTT_DESTROY SMC_RxI_CALL(0x015e) > +#define SMC_RMI_RTT_FOLD SMC_RxI_CALL(0x0166) > +#define SMC_RMI_RTT_INIT_RIPAS SMC_RxI_CALL(0x0168) > +#define SMC_RMI_RTT_MAP_UNPROTECTED SMC_RxI_CALL(0x015f) > +#define SMC_RMI_RTT_READ_ENTRY SMC_RxI_CALL(0x0161) > +#define SMC_RMI_RTT_SET_RIPAS SMC_RxI_CALL(0x0169) > +#define SMC_RMI_RTT_UNMAP_UNPROTECTED SMC_RxI_CALL(0x0162) > +#define SMC_RMI_VERSION SMC_RxI_CALL(0x0150) > + > +#define RMI_ABI_MAJOR_VERSION 1 > +#define RMI_ABI_MINOR_VERSION 0 > + > +#define RMI_UNASSIGNED 0 > +#define RMI_ASSIGNED 1 > +#define RMI_TABLE 2 > + > +#define RMI_ABI_VERSION_GET_MAJOR(version) ((version) >> 16) > +#define RMI_ABI_VERSION_GET_MINOR(version) ((version) & 0xFFFF) > +#define RMI_ABI_VERSION(major, minor) (((major) << 16) | (minor)) super minor nit: Please could we keep it closer to the RMI_ABI_M..R_VERSION defintions ? > + > +#define RMI_RETURN_STATUS(ret) ((ret) & 0xFF) > +#define RMI_RETURN_INDEX(ret) (((ret) >> 8) & 0xFF) > + > +#define RMI_SUCCESS 0 > +#define RMI_ERROR_INPUT 1 > +#define RMI_ERROR_REALM 2 > +#define RMI_ERROR_REC 3 > +#define RMI_ERROR_RTT 4 > + > +#define RMI_EMPTY 0 > +#define RMI_RAM 1 > +#define RMI_DESTROYED 2 > + > +#define RMI_NO_MEASURE_CONTENT 0 > +#define RMI_MEASURE_CONTENT 1 > + > +#define RMI_FEATURE_REGISTER_0_S2SZ GENMASK(7, 0) > +#define RMI_FEATURE_REGISTER_0_LPA2 BIT(8) > +#define RMI_FEATURE_REGISTER_0_SVE_EN BIT(9) > +#define RMI_FEATURE_REGISTER_0_SVE_VL GENMASK(13, 10) > +#define RMI_FEATURE_REGISTER_0_NUM_BPS GENMASK(19, 14) > +#define RMI_FEATURE_REGISTER_0_NUM_WPS GENMASK(25, 20) > +#define RMI_FEATURE_REGISTER_0_PMU_EN BIT(26) > +#define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS GENMASK(31, 27) > +#define RMI_FEATURE_REGISTER_0_HASH_SHA_256 BIT(32) > +#define RMI_FEATURE_REGISTER_0_HASH_SHA_512 BIT(33) > +#define RMI_FEATURE_REGISTER_0_GICV3_NUM_LRS GENMASK(37, 34) > +#define RMI_FEATURE_REGISTER_0_MAX_RECS_ORDER GENMASK(41, 38) > + > +#define RMI_REALM_PARAM_FLAG_LPA2 BIT(0) > +#define RMI_REALM_PARAM_FLAG_SVE BIT(1) > +#define RMI_REALM_PARAM_FLAG_PMU BIT(2) > + > +/* > + * Note many of these fields are smaller than u64 but all fields have u64 > + * alignment, so use u64 to ensure correct alignment. > + */ > +struct realm_params { > + union { /* 0x0 */ > + struct { > + u64 flags; > + u64 s2sz; > + u64 sve_vl; > + u64 num_bps; > + u64 num_wps; > + u64 pmu_num_ctrs; > + u64 hash_algo; > + }; > + u8 padding_1[0x400]; super minor nit: padding_[0-9] vs padding[0-9] below for other objects. It may be nicer to keep them consistent. > + }; > + union { /* 0x400 */ > + u8 rpv[64]; > + u8 padding_2[0x400]; > + }; > + union { /* 0x800 */ > + struct { > + u64 vmid; > + u64 rtt_base; > + s64 rtt_level_start; > + u64 rtt_num_start; > + }; > + u8 padding_3[0x800]; > + }; > +}; > + > +/* > + * The number of GPRs (starting from X0) that are > + * configured by the host when a REC is created. > + */ > +#define REC_CREATE_NR_GPRS 8 > + > +#define REC_PARAMS_FLAG_RUNNABLE BIT_ULL(0) > + > +#define REC_PARAMS_AUX_GRANULES 16 > + > +struct rec_params { > + union { /* 0x0 */ > + u64 flags; > + u8 padding1[0x100]; > + }; > + union { /* 0x100 */ > + u64 mpidr; > + u8 padding2[0x100]; > + }; > + union { /* 0x200 */ > + u64 pc; > + u8 padding3[0x100]; > + }; > + union { /* 0x300 */ > + u64 gprs[REC_CREATE_NR_GPRS]; > + u8 padding4[0x500]; > + }; > + union { /* 0x800 */ > + struct { > + u64 num_rec_aux; > + u64 aux[REC_PARAMS_AUX_GRANULES]; > + }; > + u8 padding5[0x800]; > + }; > +}; > + > +#define RMI_EMULATED_MMIO BIT(0) > +#define RMI_INJECT_SEA BIT(1) > +#define RMI_TRAP_WFI BIT(2) > +#define RMI_TRAP_WFE BIT(3) > +#define RMI_RIPAS_RESPONSE BIT(4) minor nit: I was hoping to suggest something that gives a clue of REC_ENTER_FLAGS, but it may be too long. #define RMI_REC_ENTER_FLAG_EMULATED_MMIO BIT(0) #define RMI_REC_ENTER_.. similar to REC_PARAM_FLAG/RMI_PARAM_FLAG. May be REC_ENTER_FLAG_xxx even. Thoughts ? Suzuki > + > +#define REC_RUN_GPRS 31 > +#define REC_GIC_NUM_LRS 16 > + > +struct rec_enter { > + union { /* 0x000 */ > + u64 flags; > + u8 padding0[0x200]; > + }; > + union { /* 0x200 */ > + u64 gprs[REC_RUN_GPRS]; > + u8 padding2[0x100]; > + }; > + union { /* 0x300 */ > + struct { > + u64 gicv3_hcr; > + u64 gicv3_lrs[REC_GIC_NUM_LRS]; > + }; > + u8 padding3[0x100]; > + }; > + u8 padding4[0x400]; > +}; > + > +#define RMI_EXIT_SYNC 0x00 > +#define RMI_EXIT_IRQ 0x01 > +#define RMI_EXIT_FIQ 0x02 > +#define RMI_EXIT_PSCI 0x03 > +#define RMI_EXIT_RIPAS_CHANGE 0x04 > +#define RMI_EXIT_HOST_CALL 0x05 > +#define RMI_EXIT_SERROR 0x06 > + > +struct rec_exit { > + union { /* 0x000 */ > + u8 exit_reason; > + u8 padding0[0x100]; > + }; > + union { /* 0x100 */ > + struct { > + u64 esr; > + u64 far; > + u64 hpfar; > + }; > + u8 padding1[0x100]; > + }; > + union { /* 0x200 */ > + u64 gprs[REC_RUN_GPRS]; > + u8 padding2[0x100]; > + }; > + union { /* 0x300 */ > + struct { > + u64 gicv3_hcr; > + u64 gicv3_lrs[REC_GIC_NUM_LRS]; > + u64 gicv3_misr; > + u64 gicv3_vmcr; > + }; > + u8 padding3[0x100]; > + }; > + union { /* 0x400 */ > + struct { > + u64 cntp_ctl; > + u64 cntp_cval; > + u64 cntv_ctl; > + u64 cntv_cval; > + }; > + u8 padding4[0x100]; > + }; > + union { /* 0x500 */ > + struct { > + u64 ripas_base; > + u64 ripas_top; > + u64 ripas_value; > + }; > + u8 padding5[0x100]; > + }; > + union { /* 0x600 */ > + u16 imm; > + u8 padding6[0x100]; > + }; > + union { /* 0x700 */ > + struct { > + u8 pmu_ovf_status; > + }; > + u8 padding7[0x100]; > + }; > +}; > + > +struct rec_run { > + struct rec_enter enter; > + struct rec_exit exit; > +}; > + > +#endif
Hi Steven, On 8/22/24 1:38 AM, Steven Price wrote: > The RMM (Realm Management Monitor) provides functionality that can be > accessed by SMC calls from the host. > > The SMC definitions are based on DEN0137[1] version 1.0-rel0-rc1 > > [1] https://developer.arm.com/-/cdn-downloads/permalink/PDF/Architectures/DEN0137_1.0-rel0-rc1_rmm-arch_external.pdf > > Signed-off-by: Steven Price <steven.price@arm.com> > --- > Changes since v3: > * Update to match RMM spec v1.0-rel0-rc1. > Changes since v2: > * Fix specification link. > * Rename rec_entry->rec_enter to match spec. > * Fix size of pmu_ovf_status to match spec. > --- > arch/arm64/include/asm/rmi_smc.h | 253 +++++++++++++++++++++++++++++++ > 1 file changed, 253 insertions(+) > create mode 100644 arch/arm64/include/asm/rmi_smc.h > [...] > + > +#define RMI_FEATURE_REGISTER_0_S2SZ GENMASK(7, 0) > +#define RMI_FEATURE_REGISTER_0_LPA2 BIT(8) > +#define RMI_FEATURE_REGISTER_0_SVE_EN BIT(9) > +#define RMI_FEATURE_REGISTER_0_SVE_VL GENMASK(13, 10) > +#define RMI_FEATURE_REGISTER_0_NUM_BPS GENMASK(19, 14) > +#define RMI_FEATURE_REGISTER_0_NUM_WPS GENMASK(25, 20) > +#define RMI_FEATURE_REGISTER_0_PMU_EN BIT(26) > +#define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS GENMASK(31, 27) > +#define RMI_FEATURE_REGISTER_0_HASH_SHA_256 BIT(32) > +#define RMI_FEATURE_REGISTER_0_HASH_SHA_512 BIT(33) > +#define RMI_FEATURE_REGISTER_0_GICV3_NUM_LRS GENMASK(37, 34) > +#define RMI_FEATURE_REGISTER_0_MAX_RECS_ORDER GENMASK(41, 38) > + Those definitions aren't consistent to tf-rmm at least. For example, the latest tf-rmm has bit-28 and bit-29 for RMI_FEATURE_REGISTER_0_HASH_SHA_{256, 512}. I didn't check the specification yet, but they need to be corrected in Linux host or tf-rmm. git@github.com:TF-RMM/tf-rmm.git head: 258b7952640b Merge "fix(tools/clang-tidy): ignore header include check" into integration [gshan@gshan tf-rmm]$ git grep RMI_FEATURE_REGISTER_0_HASH_SHA.*_SHIFT lib/smc/include/smc-rmi.h:#define RMI_FEATURE_REGISTER_0_HASH_SHA_256_SHIFT UL(28) lib/smc/include/smc-rmi.h:#define RMI_FEATURE_REGISTER_0_HASH_SHA_512_SHIFT UL(29) Due to the inconsistent definitions, I'm unable to start a guest with the following combination: linux-host/cca-host/v4, linux-guest/cca-guest/v5, kvmtool/cca/v2. # ./start_guest.sh Info: # lkvm run -k Image -m 256 -c 2 --name guest-152 [ 145.894085] config_realm_hash_algo: unsupported ALGO_SHA256 by rmm_feat_reg0=0x0000000034488e30 KVM_CAP_RME(KVM_CAP_ARM_RME_CONFIG_REALM) hash_algo: Invalid argument Thanks, Gavin
On 9/6/24 10:11 AM, Gavin Shan wrote: > On 8/22/24 1:38 AM, Steven Price wrote: >> The RMM (Realm Management Monitor) provides functionality that can be >> accessed by SMC calls from the host. >> >> The SMC definitions are based on DEN0137[1] version 1.0-rel0-rc1 >> >> [1] https://developer.arm.com/-/cdn-downloads/permalink/PDF/Architectures/DEN0137_1.0-rel0-rc1_rmm-arch_external.pdf >> >> Signed-off-by: Steven Price <steven.price@arm.com> >> --- >> Changes since v3: >> * Update to match RMM spec v1.0-rel0-rc1. >> Changes since v2: >> * Fix specification link. >> * Rename rec_entry->rec_enter to match spec. >> * Fix size of pmu_ovf_status to match spec. >> --- >> arch/arm64/include/asm/rmi_smc.h | 253 +++++++++++++++++++++++++++++++ >> 1 file changed, 253 insertions(+) >> create mode 100644 arch/arm64/include/asm/rmi_smc.h >> > > [...] > >> + >> +#define RMI_FEATURE_REGISTER_0_S2SZ GENMASK(7, 0) >> +#define RMI_FEATURE_REGISTER_0_LPA2 BIT(8) >> +#define RMI_FEATURE_REGISTER_0_SVE_EN BIT(9) >> +#define RMI_FEATURE_REGISTER_0_SVE_VL GENMASK(13, 10) >> +#define RMI_FEATURE_REGISTER_0_NUM_BPS GENMASK(19, 14) >> +#define RMI_FEATURE_REGISTER_0_NUM_WPS GENMASK(25, 20) >> +#define RMI_FEATURE_REGISTER_0_PMU_EN BIT(26) >> +#define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS GENMASK(31, 27) >> +#define RMI_FEATURE_REGISTER_0_HASH_SHA_256 BIT(32) >> +#define RMI_FEATURE_REGISTER_0_HASH_SHA_512 BIT(33) >> +#define RMI_FEATURE_REGISTER_0_GICV3_NUM_LRS GENMASK(37, 34) >> +#define RMI_FEATURE_REGISTER_0_MAX_RECS_ORDER GENMASK(41, 38) >> + > > Those definitions aren't consistent to tf-rmm at least. For example, the latest tf-rmm > has bit-28 and bit-29 for RMI_FEATURE_REGISTER_0_HASH_SHA_{256, 512}. I didn't check the > specification yet, but they need to be corrected in Linux host or tf-rmm. > > git@github.com:TF-RMM/tf-rmm.git > head: 258b7952640b Merge "fix(tools/clang-tidy): ignore header include check" into integration > > [gshan@gshan tf-rmm]$ git grep RMI_FEATURE_REGISTER_0_HASH_SHA.*_SHIFT > lib/smc/include/smc-rmi.h:#define RMI_FEATURE_REGISTER_0_HASH_SHA_256_SHIFT UL(28) > lib/smc/include/smc-rmi.h:#define RMI_FEATURE_REGISTER_0_HASH_SHA_512_SHIFT UL(29) > > Due to the inconsistent definitions, I'm unable to start a guest with the following > combination: linux-host/cca-host/v4, linux-guest/cca-guest/v5, kvmtool/cca/v2. > > # ./start_guest.sh > Info: # lkvm run -k Image -m 256 -c 2 --name guest-152 > [ 145.894085] config_realm_hash_algo: unsupported ALGO_SHA256 by rmm_feat_reg0=0x0000000034488e30 > KVM_CAP_RME(KVM_CAP_ARM_RME_CONFIG_REALM) hash_algo: Invalid argument > Please ignore above comments. As Steven pointed out in another thread, the TF-RMM needs to be something other than the latest upstream one. With the TF-RMM, I'm able to boot the guest with cca/host-v4 and cca/guest-v5. git fetch https://git.trustedfirmware.org/TF-RMM/tf-rmm.git \ refs/changes/85/30485/11 Thanks, Gavin
diff --git a/arch/arm64/include/asm/rmi_smc.h b/arch/arm64/include/asm/rmi_smc.h new file mode 100644 index 000000000000..5ee71c12a9cd --- /dev/null +++ b/arch/arm64/include/asm/rmi_smc.h @@ -0,0 +1,253 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023-2024 ARM Ltd. + * + * The values and structures in this file are from the Realm Management Monitor + * specification (DEN0137) version 1.0-rel0-rc1: + * https://developer.arm.com/-/cdn-downloads/permalink/PDF/Architectures/DEN0137_1.0-rel0-rc1_rmm-arch_external.pdf + */ + +#ifndef __ASM_RME_SMC_H +#define __ASM_RME_SMC_H + +#include <linux/arm-smccc.h> + +#define SMC_RxI_CALL(func) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_STANDARD, \ + (func)) + +#define SMC_RMI_DATA_CREATE SMC_RxI_CALL(0x0153) +#define SMC_RMI_DATA_CREATE_UNKNOWN SMC_RxI_CALL(0x0154) +#define SMC_RMI_DATA_DESTROY SMC_RxI_CALL(0x0155) +#define SMC_RMI_FEATURES SMC_RxI_CALL(0x0165) +#define SMC_RMI_GRANULE_DELEGATE SMC_RxI_CALL(0x0151) +#define SMC_RMI_GRANULE_UNDELEGATE SMC_RxI_CALL(0x0152) +#define SMC_RMI_PSCI_COMPLETE SMC_RxI_CALL(0x0164) +#define SMC_RMI_REALM_ACTIVATE SMC_RxI_CALL(0x0157) +#define SMC_RMI_REALM_CREATE SMC_RxI_CALL(0x0158) +#define SMC_RMI_REALM_DESTROY SMC_RxI_CALL(0x0159) +#define SMC_RMI_REC_AUX_COUNT SMC_RxI_CALL(0x0167) +#define SMC_RMI_REC_CREATE SMC_RxI_CALL(0x015a) +#define SMC_RMI_REC_DESTROY SMC_RxI_CALL(0x015b) +#define SMC_RMI_REC_ENTER SMC_RxI_CALL(0x015c) +#define SMC_RMI_RTT_CREATE SMC_RxI_CALL(0x015d) +#define SMC_RMI_RTT_DESTROY SMC_RxI_CALL(0x015e) +#define SMC_RMI_RTT_FOLD SMC_RxI_CALL(0x0166) +#define SMC_RMI_RTT_INIT_RIPAS SMC_RxI_CALL(0x0168) +#define SMC_RMI_RTT_MAP_UNPROTECTED SMC_RxI_CALL(0x015f) +#define SMC_RMI_RTT_READ_ENTRY SMC_RxI_CALL(0x0161) +#define SMC_RMI_RTT_SET_RIPAS SMC_RxI_CALL(0x0169) +#define SMC_RMI_RTT_UNMAP_UNPROTECTED SMC_RxI_CALL(0x0162) +#define SMC_RMI_VERSION SMC_RxI_CALL(0x0150) + +#define RMI_ABI_MAJOR_VERSION 1 +#define RMI_ABI_MINOR_VERSION 0 + +#define RMI_UNASSIGNED 0 +#define RMI_ASSIGNED 1 +#define RMI_TABLE 2 + +#define RMI_ABI_VERSION_GET_MAJOR(version) ((version) >> 16) +#define RMI_ABI_VERSION_GET_MINOR(version) ((version) & 0xFFFF) +#define RMI_ABI_VERSION(major, minor) (((major) << 16) | (minor)) + +#define RMI_RETURN_STATUS(ret) ((ret) & 0xFF) +#define RMI_RETURN_INDEX(ret) (((ret) >> 8) & 0xFF) + +#define RMI_SUCCESS 0 +#define RMI_ERROR_INPUT 1 +#define RMI_ERROR_REALM 2 +#define RMI_ERROR_REC 3 +#define RMI_ERROR_RTT 4 + +#define RMI_EMPTY 0 +#define RMI_RAM 1 +#define RMI_DESTROYED 2 + +#define RMI_NO_MEASURE_CONTENT 0 +#define RMI_MEASURE_CONTENT 1 + +#define RMI_FEATURE_REGISTER_0_S2SZ GENMASK(7, 0) +#define RMI_FEATURE_REGISTER_0_LPA2 BIT(8) +#define RMI_FEATURE_REGISTER_0_SVE_EN BIT(9) +#define RMI_FEATURE_REGISTER_0_SVE_VL GENMASK(13, 10) +#define RMI_FEATURE_REGISTER_0_NUM_BPS GENMASK(19, 14) +#define RMI_FEATURE_REGISTER_0_NUM_WPS GENMASK(25, 20) +#define RMI_FEATURE_REGISTER_0_PMU_EN BIT(26) +#define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS GENMASK(31, 27) +#define RMI_FEATURE_REGISTER_0_HASH_SHA_256 BIT(32) +#define RMI_FEATURE_REGISTER_0_HASH_SHA_512 BIT(33) +#define RMI_FEATURE_REGISTER_0_GICV3_NUM_LRS GENMASK(37, 34) +#define RMI_FEATURE_REGISTER_0_MAX_RECS_ORDER GENMASK(41, 38) + +#define RMI_REALM_PARAM_FLAG_LPA2 BIT(0) +#define RMI_REALM_PARAM_FLAG_SVE BIT(1) +#define RMI_REALM_PARAM_FLAG_PMU BIT(2) + +/* + * Note many of these fields are smaller than u64 but all fields have u64 + * alignment, so use u64 to ensure correct alignment. + */ +struct realm_params { + union { /* 0x0 */ + struct { + u64 flags; + u64 s2sz; + u64 sve_vl; + u64 num_bps; + u64 num_wps; + u64 pmu_num_ctrs; + u64 hash_algo; + }; + u8 padding_1[0x400]; + }; + union { /* 0x400 */ + u8 rpv[64]; + u8 padding_2[0x400]; + }; + union { /* 0x800 */ + struct { + u64 vmid; + u64 rtt_base; + s64 rtt_level_start; + u64 rtt_num_start; + }; + u8 padding_3[0x800]; + }; +}; + +/* + * The number of GPRs (starting from X0) that are + * configured by the host when a REC is created. + */ +#define REC_CREATE_NR_GPRS 8 + +#define REC_PARAMS_FLAG_RUNNABLE BIT_ULL(0) + +#define REC_PARAMS_AUX_GRANULES 16 + +struct rec_params { + union { /* 0x0 */ + u64 flags; + u8 padding1[0x100]; + }; + union { /* 0x100 */ + u64 mpidr; + u8 padding2[0x100]; + }; + union { /* 0x200 */ + u64 pc; + u8 padding3[0x100]; + }; + union { /* 0x300 */ + u64 gprs[REC_CREATE_NR_GPRS]; + u8 padding4[0x500]; + }; + union { /* 0x800 */ + struct { + u64 num_rec_aux; + u64 aux[REC_PARAMS_AUX_GRANULES]; + }; + u8 padding5[0x800]; + }; +}; + +#define RMI_EMULATED_MMIO BIT(0) +#define RMI_INJECT_SEA BIT(1) +#define RMI_TRAP_WFI BIT(2) +#define RMI_TRAP_WFE BIT(3) +#define RMI_RIPAS_RESPONSE BIT(4) + +#define REC_RUN_GPRS 31 +#define REC_GIC_NUM_LRS 16 + +struct rec_enter { + union { /* 0x000 */ + u64 flags; + u8 padding0[0x200]; + }; + union { /* 0x200 */ + u64 gprs[REC_RUN_GPRS]; + u8 padding2[0x100]; + }; + union { /* 0x300 */ + struct { + u64 gicv3_hcr; + u64 gicv3_lrs[REC_GIC_NUM_LRS]; + }; + u8 padding3[0x100]; + }; + u8 padding4[0x400]; +}; + +#define RMI_EXIT_SYNC 0x00 +#define RMI_EXIT_IRQ 0x01 +#define RMI_EXIT_FIQ 0x02 +#define RMI_EXIT_PSCI 0x03 +#define RMI_EXIT_RIPAS_CHANGE 0x04 +#define RMI_EXIT_HOST_CALL 0x05 +#define RMI_EXIT_SERROR 0x06 + +struct rec_exit { + union { /* 0x000 */ + u8 exit_reason; + u8 padding0[0x100]; + }; + union { /* 0x100 */ + struct { + u64 esr; + u64 far; + u64 hpfar; + }; + u8 padding1[0x100]; + }; + union { /* 0x200 */ + u64 gprs[REC_RUN_GPRS]; + u8 padding2[0x100]; + }; + union { /* 0x300 */ + struct { + u64 gicv3_hcr; + u64 gicv3_lrs[REC_GIC_NUM_LRS]; + u64 gicv3_misr; + u64 gicv3_vmcr; + }; + u8 padding3[0x100]; + }; + union { /* 0x400 */ + struct { + u64 cntp_ctl; + u64 cntp_cval; + u64 cntv_ctl; + u64 cntv_cval; + }; + u8 padding4[0x100]; + }; + union { /* 0x500 */ + struct { + u64 ripas_base; + u64 ripas_top; + u64 ripas_value; + }; + u8 padding5[0x100]; + }; + union { /* 0x600 */ + u16 imm; + u8 padding6[0x100]; + }; + union { /* 0x700 */ + struct { + u8 pmu_ovf_status; + }; + u8 padding7[0x100]; + }; +}; + +struct rec_run { + struct rec_enter enter; + struct rec_exit exit; +}; + +#endif
The RMM (Realm Management Monitor) provides functionality that can be accessed by SMC calls from the host. The SMC definitions are based on DEN0137[1] version 1.0-rel0-rc1 [1] https://developer.arm.com/-/cdn-downloads/permalink/PDF/Architectures/DEN0137_1.0-rel0-rc1_rmm-arch_external.pdf Signed-off-by: Steven Price <steven.price@arm.com> --- Changes since v3: * Update to match RMM spec v1.0-rel0-rc1. Changes since v2: * Fix specification link. * Rename rec_entry->rec_enter to match spec. * Fix size of pmu_ovf_status to match spec. --- arch/arm64/include/asm/rmi_smc.h | 253 +++++++++++++++++++++++++++++++ 1 file changed, 253 insertions(+) create mode 100644 arch/arm64/include/asm/rmi_smc.h