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Peter Anvin" , Thomas Gleixner , Kim Phillips Subject: [PATCH v2 1/2] x86/cpufeatures: Add "Allowed SEV Features" Feature Date: Thu, 22 Aug 2024 17:19:37 -0500 Message-ID: <20240822221938.2192109-2-kim.phillips@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240822221938.2192109-1-kim.phillips@amd.com> References: <20240822221938.2192109-1-kim.phillips@amd.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D2:EE_|IA1PR12MB8496:EE_ X-MS-Office365-Filtering-Correlation-Id: c3742c60-02c5-4154-77a8-08dcc2f89193 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|376014|7416014|82310400026; X-Microsoft-Antispam-Message-Info: Lv2JbVuH/Nw5bSEi32+STPGwSWvyH6tmiVgoNddGWra3lvbn3HinfxoV1nQsU4qllRKa8XXxsZLjBtjsfRHbPJ4Z7NdJXNNZcMeE54/0mIVP++aaeOKPsDRMta3IsP7hSSOuRshLtpKs+NxrEu53oSJnEiYKa4nm9diUKe2B0mdadYU+58tRclnM1Q4T65DRlmZ3RxjJmAJLEjX6CMK4keZsIA6komrwL9Rw6N9oWmp1poVxF/kKok0fgZR2V/rwxJmrjYjbS92Fqo7NjL/mDv4neFKhC48Y737KO3um8Gz7qHT18cX6DyrETBGlLiqbzORBsny4PRiXsd+KQrzgxZyuiFOyT/NnieEw7drmwMLYa50ZpWPG/9KMg11LEUocm6TVid4B5NYdZfGj/HsrOuA36MBL6PGzH68G5WXwb+4jOrEZcU4t6zXi0VcCmuTUInxwQjs5e6l4HoUS+wuFcQBhmfKfGpqMsWnQt56yxYex3vEUv/MLWBjc01Ipcm/0F4uIDcH79xNSjNFlIBTvF8F+b9q0E1oLZgZK4ScdePjSDj1Bn4Y79aUBeAOU4P+HO2/ra9uQapQ3Ab/PWj3mG4RCAzfEoXDm5QMIRjDnECtRqy+h6U6Sq73+g6FCadRICH+bfRSli69Z30TLgVZLwL61I+a0U5LICFcs1ekUHEmSpiyrUkFOdzQXe44AgV8rdnCNKvSbxR6ZbXszXpPoM3RKUL+kbEa5hF/8nLZN9/GVEUftPTGwUql6b6NgO1frf6jMH4lscOASe+YcEwKW47uCq5M/tz4988Jza+wvD1N/s1pAUO1bwCnS5rNDCti/x2uYyRP3A4kG5CQ/ClSPZozP5k1R2bFGoHSGNQTiOgu55DVrDcSCyzVwMck5p7/nSNZ8R7BY8Xy7bNTm8YkFkIAKhyiaNjMUfZqp+k00fxIfZnD69nTPe3EzhIaCyCuza4FjXroH1KLpzpHNgd1pp2MQixAOcbxIzOUt6TzNwMMKsyE3RZgzuzMe5dCGnqgs1jZ4tsXSJJNrLaw1UMIlSvhzH2nqUIgDYOM9HKKgxejVLH04fr3Desvm/ItgtQSKjz6UPo/m5c2D8/e2DPonfRya6l5zQMRsFdvHGtu+6lVlxYKsJSJCeyulRoCT4zrawYZql2+/IfU9akwIeTo0sHqiuRpUUyCLC+TW+ruaSMuJPfffO5HpVgDDAL1Bz5ZPfX1Y6oBVtziBKWd3I75EGU+HftL5+jswQ4B2fZ4iC7axL0rbCvuhgKEuBJXl6H0hKod6zKLivSqpNHOk5byqy8XDMvuiCygaWEZaBJJ6BKdFfRcpcfx1fmFsbWC6Zo9qMOudHwW9NzPY1bldO5X7hfJu8mhzWrHHFbAWWUccYdTWaxgaWEeSVxaMPzImBwncpBK9jx0vSLwL6NDK3ZSi9MKvkBtKAHMuBZfrh4KYAXm60PE8Px4U7XRxKRfiOlQ/ X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(376014)(7416014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Aug 2024 22:20:02.7306 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c3742c60-02c5-4154-77a8-08dcc2f89193 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D2.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8496 Add CPU feature detection for "Allowed SEV Features" to allow the Hypervisor to enforce that SEV-ES and SEV-SNP guest VMs cannot enable features (via SEV_FEATURES) that the Hypervisor does not support or wish to be enabled. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Kim Phillips --- v2: no changes arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index dd4682857c12..0c73da91a041 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -447,6 +447,7 @@ #define X86_FEATURE_V_TSC_AUX (19*32+ 9) /* Virtual TSC_AUX */ #define X86_FEATURE_SME_COHERENT (19*32+10) /* AMD hardware-enforced cache coherency */ #define X86_FEATURE_DEBUG_SWAP (19*32+14) /* "debug_swap" AMD SEV-ES full debug state swap support */ +#define X86_FEATURE_ALLOWED_SEV_FEATURES (19*32+27) /* AMD Allowed SEV Features */ #define X86_FEATURE_SVSM (19*32+28) /* "svsm" SVSM present */ /* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */