| Message ID | 20241003234337.273364-9-seanjc@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: selftests: AVX support + fixes | expand |
Sean Christopherson <seanjc@google.com> writes: > Now that CR4.OSXSAVE and XCR0 are setup by default, drop the manual > enabling of OXSAVE and XTILE from the AMX test. > > Signed-off-by: Sean Christopherson <seanjc@google.com> > --- > tools/testing/selftests/kvm/x86_64/amx_test.c | 23 ++++--------------- > 1 file changed, 4 insertions(+), 19 deletions(-) > > diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c > index 903940c54d2d..f4ce5a185a7d 100644 > --- a/tools/testing/selftests/kvm/x86_64/amx_test.c > +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c > @@ -86,6 +86,8 @@ static inline void __xsavec(struct xstate *xstate, uint64_t rfbm) > > static void check_xtile_info(void) > { > + GUEST_ASSERT((xgetbv(0) & XFEATURE_MASK_XTILE) == XFEATURE_MASK_XTILE); > + > GUEST_ASSERT(this_cpu_has_p(X86_PROPERTY_XSTATE_MAX_SIZE_XCR0)); > GUEST_ASSERT(this_cpu_property(X86_PROPERTY_XSTATE_MAX_SIZE_XCR0) <= XSAVE_SIZE); > > @@ -122,29 +124,12 @@ static void set_tilecfg(struct tile_config *cfg) > } > } > > -static void init_regs(void) > -{ > - uint64_t cr4, xcr0; > - > - GUEST_ASSERT(this_cpu_has(X86_FEATURE_XSAVE)); > - > - /* turn on CR4.OSXSAVE */ > - cr4 = get_cr4(); > - cr4 |= X86_CR4_OSXSAVE; > - set_cr4(cr4); > - GUEST_ASSERT(this_cpu_has(X86_FEATURE_OSXSAVE)); > - > - xcr0 = xgetbv(0); > - xcr0 |= XFEATURE_MASK_XTILE; > - xsetbv(0x0, xcr0); > - GUEST_ASSERT((xgetbv(0) & XFEATURE_MASK_XTILE) == XFEATURE_MASK_XTILE); > -} > - > static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, > struct tile_data *tiledata, > struct xstate *xstate) > { > - init_regs(); > + GUEST_ASSERT(this_cpu_has(X86_FEATURE_XSAVE) && > + this_cpu_has(X86_FEATURE_OSXSAVE)); Maybe GUEST_ASSERT(get_cr4() & X86_CR4_OSXSAVE); also (or instead), just like cr4_cpuid_sync_test? > check_xtile_info(); > GUEST_SYNC(1); Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com>
diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 903940c54d2d..f4ce5a185a7d 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -86,6 +86,8 @@ static inline void __xsavec(struct xstate *xstate, uint64_t rfbm) static void check_xtile_info(void) { + GUEST_ASSERT((xgetbv(0) & XFEATURE_MASK_XTILE) == XFEATURE_MASK_XTILE); + GUEST_ASSERT(this_cpu_has_p(X86_PROPERTY_XSTATE_MAX_SIZE_XCR0)); GUEST_ASSERT(this_cpu_property(X86_PROPERTY_XSTATE_MAX_SIZE_XCR0) <= XSAVE_SIZE); @@ -122,29 +124,12 @@ static void set_tilecfg(struct tile_config *cfg) } } -static void init_regs(void) -{ - uint64_t cr4, xcr0; - - GUEST_ASSERT(this_cpu_has(X86_FEATURE_XSAVE)); - - /* turn on CR4.OSXSAVE */ - cr4 = get_cr4(); - cr4 |= X86_CR4_OSXSAVE; - set_cr4(cr4); - GUEST_ASSERT(this_cpu_has(X86_FEATURE_OSXSAVE)); - - xcr0 = xgetbv(0); - xcr0 |= XFEATURE_MASK_XTILE; - xsetbv(0x0, xcr0); - GUEST_ASSERT((xgetbv(0) & XFEATURE_MASK_XTILE) == XFEATURE_MASK_XTILE); -} - static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, struct tile_data *tiledata, struct xstate *xstate) { - init_regs(); + GUEST_ASSERT(this_cpu_has(X86_FEATURE_XSAVE) && + this_cpu_has(X86_FEATURE_OSXSAVE)); check_xtile_info(); GUEST_SYNC(1);
Now that CR4.OSXSAVE and XCR0 are setup by default, drop the manual enabling of OXSAVE and XTILE from the AMX test. Signed-off-by: Sean Christopherson <seanjc@google.com> --- tools/testing/selftests/kvm/x86_64/amx_test.c | 23 ++++--------------- 1 file changed, 4 insertions(+), 19 deletions(-)