diff mbox series

[v12,15/19] tsc: Upgrade TSC clocksource rating

Message ID 20241009092850.197575-16-nikunj@amd.com (mailing list archive)
State New, archived
Headers show
Series Add Secure TSC support for SNP guests | expand

Commit Message

Nikunj A. Dadhania Oct. 9, 2024, 9:28 a.m. UTC
In virtualized environments running on modern CPUs, the underlying
platforms guarantees to have a stable, always running TSC, i.e. that the
TSC is a superior timesource as compared to other clock sources (such as
kvmclock, HPET, ACPI timer, APIC, etc.).

Upgrade the rating of the early and regular clock source to prefer TSC over
other clock sources when TSC is invariant, non-stop and stable.

Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
---
 arch/x86/kernel/tsc.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Comments

Sean Christopherson Oct. 9, 2024, 4:16 p.m. UTC | #1
On Wed, Oct 09, 2024, Nikunj A Dadhania wrote:
> In virtualized environments running on modern CPUs, the underlying
> platforms guarantees to have a stable, always running TSC, i.e. that the
> TSC is a superior timesource as compared to other clock sources (such as
> kvmclock, HPET, ACPI timer, APIC, etc.).
> 
> Upgrade the rating of the early and regular clock source to prefer TSC over
> other clock sources when TSC is invariant, non-stop and stable.
> 
> Suggested-by: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
> ---
>  arch/x86/kernel/tsc.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
> index c83f1091bb4f..8150f2104474 100644
> --- a/arch/x86/kernel/tsc.c
> +++ b/arch/x86/kernel/tsc.c
> @@ -1264,6 +1264,21 @@ static void __init check_system_tsc_reliable(void)
>  		tsc_disable_clocksource_watchdog();
>  }
>  
> +static void __init upgrade_clock_rating(struct clocksource *tsc_early,
> +					struct clocksource *tsc)
> +{
> +	/*
> +	 * Upgrade the clock rating for TSC early and regular clocksource when
> +	 * the underlying platform provides non-stop, invaraint and stable TSC.
> +	 */
> +	if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
> +	    boot_cpu_has(X86_FEATURE_NONSTOP_TSC) &&
> +	    !tsc_unstable) {

Somewhat of a side topic, should KVM (as a hypervisor) be enumerating something
to guests to inform them that the TSC is reliable, i.e. that X86_FEATURE_TSC_RELIABLE
can be forced?  Or, should KVM (as the guest) infer X86_FEATURE_TSC_RELIABLE if
INVARIANT_TSC is advertised by KVM (the hyperivosor)?

Also, why on earth is 0x8000_0007.EDX manually scattered via x86_power?

> +		tsc_early->rating = 499;
> +		tsc->rating = 500;
> +	}
> +}
Nikunj A. Dadhania Oct. 10, 2024, 6:44 a.m. UTC | #2
On 10/9/2024 9:46 PM, Sean Christopherson wrote:
> On Wed, Oct 09, 2024, Nikunj A Dadhania wrote:
>> In virtualized environments running on modern CPUs, the underlying
>> platforms guarantees to have a stable, always running TSC, i.e. that the
>> TSC is a superior timesource as compared to other clock sources (such as
>> kvmclock, HPET, ACPI timer, APIC, etc.).
>>
>> Upgrade the rating of the early and regular clock source to prefer TSC over
>> other clock sources when TSC is invariant, non-stop and stable.
>>
>> Suggested-by: Thomas Gleixner <tglx@linutronix.de>
>> Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
>> ---
>>  arch/x86/kernel/tsc.c | 17 +++++++++++++++++
>>  1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
>> index c83f1091bb4f..8150f2104474 100644
>> --- a/arch/x86/kernel/tsc.c
>> +++ b/arch/x86/kernel/tsc.c
>> @@ -1264,6 +1264,21 @@ static void __init check_system_tsc_reliable(void)
>>  		tsc_disable_clocksource_watchdog();
>>  }
>>  
>> +static void __init upgrade_clock_rating(struct clocksource *tsc_early,
>> +					struct clocksource *tsc)
>> +{
>> +	/*
>> +	 * Upgrade the clock rating for TSC early and regular clocksource when
>> +	 * the underlying platform provides non-stop, invaraint and stable TSC.
>> +	 */
>> +	if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
>> +	    boot_cpu_has(X86_FEATURE_NONSTOP_TSC) &&
>> +	    !tsc_unstable) {
> 
> Somewhat of a side topic, should KVM (as a hypervisor) be enumerating something
> to guests to inform them that the TSC is reliable, i.e. that X86_FEATURE_TSC_RELIABLE
> can be forced?  

Xen does something similar by advertising TSC related information as part of 
a CPUID leaf (Leaf 4 (0x40000x03))

> Or, should KVM (as the guest) infer X86_FEATURE_TSC_RELIABLE if
> INVARIANT_TSC is advertised by KVM (the hyperivosor)?

I am not sure about this though.
 
> Also, why on earth is 0x8000_0007.EDX manually scattered via x86_power?

Are you referring to CPU capabilty settings in early_init_amd() dependent
on x86_power?

> 
>> +		tsc_early->rating = 499;
>> +		tsc->rating = 500;
>> +	}
>> +}

Regards
Nikunj
diff mbox series

Patch

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index c83f1091bb4f..8150f2104474 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -1264,6 +1264,21 @@  static void __init check_system_tsc_reliable(void)
 		tsc_disable_clocksource_watchdog();
 }
 
+static void __init upgrade_clock_rating(struct clocksource *tsc_early,
+					struct clocksource *tsc)
+{
+	/*
+	 * Upgrade the clock rating for TSC early and regular clocksource when
+	 * the underlying platform provides non-stop, invaraint and stable TSC.
+	 */
+	if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
+	    boot_cpu_has(X86_FEATURE_NONSTOP_TSC) &&
+	    !tsc_unstable) {
+		tsc_early->rating = 499;
+		tsc->rating = 500;
+	}
+}
+
 /*
  * Make an educated guess if the TSC is trustworthy and synchronized
  * over all CPUs.
@@ -1565,6 +1580,8 @@  void __init tsc_init(void)
 	if (tsc_clocksource_reliable || no_tsc_watchdog)
 		tsc_disable_clocksource_watchdog();
 
+	upgrade_clock_rating(&clocksource_tsc_early, &clocksource_tsc);
+
 	clocksource_register_khz(&clocksource_tsc_early, tsc_khz);
 	detect_art();
 }