| Message ID | 20241012104429.1048908-8-zhao1.liu@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce SMP Cache Topology | expand |
RESEND as rejected by server (header issue, hopefully fixed) On Sat, 12 Oct 2024 18:44:29 +0800 Zhao Liu <zhao1.liu@intel.com> wrote: > From: Alireza Sanaee <alireza.sanaee@huawei.com> > > Add has_caches flag to SMPCompatProps, which helps in avoiding > extra checks for every single layer of caches in x86 (and ARM in > future). > > Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com> > Signed-off-by: Zhao Liu <zhao1.liu@intel.com> LGTM Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > Note: Picked from Alireza's series with the changes: > * Moved the flag to SMPCompatProps with a new name "has_caches". > This way, it remains consistent with the function and style of > "has_clusters" in SMPCompatProps. > * Dropped my previous TODO with the new flag. > --- > Changes since Patch v2: > * Picked a new patch frome Alireza's ARM smp-cache series. > --- > hw/core/machine-smp.c | 2 ++ > include/hw/boards.h | 3 +++ > target/i386/cpu.c | 9 ++++----- > 3 files changed, 9 insertions(+), 5 deletions(-) > > diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c > index f3edbded2e7b..16e456678cb6 100644 > --- a/hw/core/machine-smp.c > +++ b/hw/core/machine-smp.c > @@ -367,6 +367,8 @@ bool machine_parse_smp_cache(MachineState *ms, > return false; > } > > + mc->smp_props.has_caches = true; > + > return true; > } > > diff --git a/include/hw/boards.h b/include/hw/boards.h > index e4a1035e3fa1..af62b09c89d1 100644 > --- a/include/hw/boards.h > +++ b/include/hw/boards.h > @@ -153,6 +153,8 @@ typedef struct { > * @modules_supported - whether modules are supported by the machine > * @cache_supported - whether cache (l1d, l1i, l2 and l3) configuration are > * supported by the machine > + * @has_caches - whether cache properties are explicitly specified in the > + * user provided smp-cache configuration > */ > typedef struct { > bool prefer_sockets; > @@ -163,6 +165,7 @@ typedef struct { > bool drawers_supported; > bool modules_supported; > bool cache_supported[CACHE_LEVEL_AND_TYPE__MAX]; > + bool has_caches; > } SMPCompatProps; > > /** > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index c8a04faf3764..6f711e98b527 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -7853,12 +7853,11 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) > > #ifndef CONFIG_USER_ONLY > MachineState *ms = MACHINE(qdev_get_machine()); > + MachineClass *mc = MACHINE_GET_CLASS(ms); > > - /* > - * TODO: Add a SMPCompatProps.has_caches flag to avoid useless Updates > - * if user didn't set smp_cache. > - */ > - x86_cpu_update_smp_cache_topo(ms, cpu); > + if (mc->smp_props.has_caches) { > + x86_cpu_update_smp_cache_topo(ms, cpu); > + } > > qemu_register_reset(x86_cpu_machine_reset_cb, cpu); >
diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c index f3edbded2e7b..16e456678cb6 100644 --- a/hw/core/machine-smp.c +++ b/hw/core/machine-smp.c @@ -367,6 +367,8 @@ bool machine_parse_smp_cache(MachineState *ms, return false; } + mc->smp_props.has_caches = true; + return true; } diff --git a/include/hw/boards.h b/include/hw/boards.h index e4a1035e3fa1..af62b09c89d1 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -153,6 +153,8 @@ typedef struct { * @modules_supported - whether modules are supported by the machine * @cache_supported - whether cache (l1d, l1i, l2 and l3) configuration are * supported by the machine + * @has_caches - whether cache properties are explicitly specified in the + * user provided smp-cache configuration */ typedef struct { bool prefer_sockets; @@ -163,6 +165,7 @@ typedef struct { bool drawers_supported; bool modules_supported; bool cache_supported[CACHE_LEVEL_AND_TYPE__MAX]; + bool has_caches; } SMPCompatProps; /** diff --git a/target/i386/cpu.c b/target/i386/cpu.c index c8a04faf3764..6f711e98b527 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7853,12 +7853,11 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) #ifndef CONFIG_USER_ONLY MachineState *ms = MACHINE(qdev_get_machine()); + MachineClass *mc = MACHINE_GET_CLASS(ms); - /* - * TODO: Add a SMPCompatProps.has_caches flag to avoid useless Updates - * if user didn't set smp_cache. - */ - x86_cpu_update_smp_cache_topo(ms, cpu); + if (mc->smp_props.has_caches) { + x86_cpu_update_smp_cache_topo(ms, cpu); + } qemu_register_reset(x86_cpu_machine_reset_cb, cpu);