[RFC,15/15] RISC-V: defconfig: Add VFIO modules

Message ID	20241114161845.502027-32-ajones@ventanamicro.com (mailing list archive)
State	New
Headers	show Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E986F1ADFEA for <kvm@vger.kernel.org>; Thu, 14 Nov 2024 16:19:13 +0000 (UTC) From: Andrew Jones <ajones@ventanamicro.com> To: iommu@lists.linux.dev, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: tjeznach@rivosinc.com, zong.li@sifive.com, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, anup@brainfault.org, atishp@atishpatra.org, tglx@linutronix.de, alex.williamson@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Subject: [RFC PATCH 15/15] RISC-V: defconfig: Add VFIO modules Date: Thu, 14 Nov 2024 17:19:00 +0100 Message-ID: <20241114161845.502027-32-ajones@ventanamicro.com> In-Reply-To: <20241114161845.502027-17-ajones@ventanamicro.com> References: <20241114161845.502027-17-ajones@ventanamicro.com> Precedence: bulk MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	iommu/riscv: Add irqbypass support \| expand [RFC,00/15] iommu/riscv: Add irqbypass support [RFC,01/15] irqchip/riscv-imsic: Use hierarchy to reach irq_set_affinity [RFC,02/15] genirq/msi: Provide DOMAIN_BUS_MSI_REMAP [RFC,03/15] irqchip/riscv-imsic: Add support for DOMAIN_BUS_MSI_REMAP [RFC,04/15] iommu/riscv: report iommu capabilities [RFC,05/15] iommu/riscv: use data structure instead of individual values [RFC,06/15] iommu/riscv: support GSCID and GVMA invalidation command [RFC,07/15] iommu/riscv: Move definitions to iommu.h [RFC,08/15] iommu/riscv: Add IRQ domain for interrupt remapping [RFC,09/15] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch [RFC,10/15] RISC-V: KVM: Add irqbypass skeleton [RFC,11/15] RISC-V: Define irqbypass vcpu_info [RFC,12/15] iommu/riscv: Add guest file irqbypass support [RFC,13/15] RISC-V: KVM: Add guest file irqbypass support [RFC,14/15] vfio: enable IOMMU_TYPE1 for RISC-V [RFC,15/15] RISC-V: defconfig: Add VFIO modules

Message ID

20241114161845.502027-32-ajones@ventanamicro.com (mailing list archive)

State

New

Headers

From: Andrew Jones <ajones@ventanamicro.com>
To: iommu@lists.linux.dev,
	kvm-riscv@lists.infradead.org,
	kvm@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: tjeznach@rivosinc.com,
	zong.li@sifive.com,
	joro@8bytes.org,
	will@kernel.org,
	robin.murphy@arm.com,
	anup@brainfault.org,
	atishp@atishpatra.org,
	tglx@linutronix.de,
	alex.williamson@redhat.com,
	paul.walmsley@sifive.com,
	palmer@dabbelt.com,
	aou@eecs.berkeley.edu
Subject: [RFC PATCH 15/15] RISC-V: defconfig: Add VFIO modules
Date: Thu, 14 Nov 2024 17:19:00 +0100
Message-ID: <20241114161845.502027-32-ajones@ventanamicro.com>
In-Reply-To: <20241114161845.502027-17-ajones@ventanamicro.com>
References: <20241114161845.502027-17-ajones@ventanamicro.com>
Precedence: bulk
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

Series

iommu/riscv: Add irqbypass support | expand

Commit Message

Andrew Jones Nov. 14, 2024, 4:19 p.m. UTC

Add the VFIO modules to the defconfig to complement KVM now
that there is IOMMU support.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 arch/riscv/configs/defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index b4a37345703e..10fc9d84a28c 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -242,6 +242,8 @@  CONFIG_RTC_DRV_SUN6I=y
 CONFIG_DMADEVICES=y
 CONFIG_DMA_SUN6I=m
 CONFIG_DW_AXI_DMAC=y
+CONFIG_VFIO=m
+CONFIG_VFIO_PCI=m
 CONFIG_VIRTIO_PCI=y
 CONFIG_VIRTIO_BALLOON=y
 CONFIG_VIRTIO_INPUT=y

[RFC,15/15] RISC-V: defconfig: Add VFIO modules

Commit Message

Patch