| Message ID | 20250123234415.59850-17-philmd@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | accel: Simplify cpu-target.c (omnibus) | expand |
On 1/23/25 15:44, Philippe Mathieu-Daudé wrote: > CPU_INTERRUPT_EXIT was removed in commit 3098dba01c7 > ("Use a dedicated function to request exit from execution > loop"), tlb_flush() and tb_flush() are related to TCG > accelerator. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > cpu-target.c | 33 +++++++++++++++++++-------------- > 1 file changed, 19 insertions(+), 14 deletions(-) > > diff --git a/cpu-target.c b/cpu-target.c > index a2999e7c3c0..c05ef1ff096 100644 > --- a/cpu-target.c > +++ b/cpu-target.c > @@ -45,22 +45,27 @@ > #ifndef CONFIG_USER_ONLY > static int cpu_common_post_load(void *opaque, int version_id) > { > - CPUState *cpu = opaque; > +#ifdef CONFIG_TCG > + if (tcg_enabled()) { Why do you need both ifdef and tcg_enabled()? I would have thought just tcg_enabled(). Are there declarations that are (unnecessarily?) protected? r~
On 26/1/25 22:16, Richard Henderson wrote: > On 1/23/25 15:44, Philippe Mathieu-Daudé wrote: >> CPU_INTERRUPT_EXIT was removed in commit 3098dba01c7 >> ("Use a dedicated function to request exit from execution >> loop"), tlb_flush() and tb_flush() are related to TCG >> accelerator. >> >> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> >> --- >> cpu-target.c | 33 +++++++++++++++++++-------------- >> 1 file changed, 19 insertions(+), 14 deletions(-) >> >> diff --git a/cpu-target.c b/cpu-target.c >> index a2999e7c3c0..c05ef1ff096 100644 >> --- a/cpu-target.c >> +++ b/cpu-target.c >> @@ -45,22 +45,27 @@ >> #ifndef CONFIG_USER_ONLY >> static int cpu_common_post_load(void *opaque, int version_id) >> { >> - CPUState *cpu = opaque; >> +#ifdef CONFIG_TCG >> + if (tcg_enabled()) { > > Why do you need both ifdef and tcg_enabled()? I would have thought just > tcg_enabled(). > > Are there declarations that are (unnecessarily?) protected? No, you are right, tcg_enabled() is sufficient, I don't remember why I added the #ifdef. Could I include your R-b tag without the #ifdef lines?
On 2/17/25 09:19, Philippe Mathieu-Daudé wrote: > On 26/1/25 22:16, Richard Henderson wrote: >> On 1/23/25 15:44, Philippe Mathieu-Daudé wrote: >>> CPU_INTERRUPT_EXIT was removed in commit 3098dba01c7 >>> ("Use a dedicated function to request exit from execution >>> loop"), tlb_flush() and tb_flush() are related to TCG >>> accelerator. >>> >>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> >>> --- >>> cpu-target.c | 33 +++++++++++++++++++-------------- >>> 1 file changed, 19 insertions(+), 14 deletions(-) >>> >>> diff --git a/cpu-target.c b/cpu-target.c >>> index a2999e7c3c0..c05ef1ff096 100644 >>> --- a/cpu-target.c >>> +++ b/cpu-target.c >>> @@ -45,22 +45,27 @@ >>> #ifndef CONFIG_USER_ONLY >>> static int cpu_common_post_load(void *opaque, int version_id) >>> { >>> - CPUState *cpu = opaque; >>> +#ifdef CONFIG_TCG >>> + if (tcg_enabled()) { >> >> Why do you need both ifdef and tcg_enabled()? I would have thought just tcg_enabled(). >> >> Are there declarations that are (unnecessarily?) protected? > > No, you are right, tcg_enabled() is sufficient, I don't remember why > I added the #ifdef. > > Could I include your R-b tag without the #ifdef lines? Yes. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/cpu-target.c b/cpu-target.c index a2999e7c3c0..c05ef1ff096 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -45,22 +45,27 @@ #ifndef CONFIG_USER_ONLY static int cpu_common_post_load(void *opaque, int version_id) { - CPUState *cpu = opaque; +#ifdef CONFIG_TCG + if (tcg_enabled()) { + CPUState *cpu = opaque; - /* - * 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the - * version_id is increased. - */ - cpu->interrupt_request &= ~0x01; - tlb_flush(cpu); + /* + * 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the + * version_id is increased. + */ + cpu->interrupt_request &= ~0x01; - /* - * loadvm has just updated the content of RAM, bypassing the - * usual mechanisms that ensure we flush TBs for writes to - * memory we've translated code from. So we must flush all TBs, - * which will now be stale. - */ - tb_flush(cpu); + tlb_flush(cpu); + + /* + * loadvm has just updated the content of RAM, bypassing the + * usual mechanisms that ensure we flush TBs for writes to + * memory we've translated code from. So we must flush all TBs, + * which will now be stale. + */ + tb_flush(cpu); + } +#endif return 0; }
CPU_INTERRUPT_EXIT was removed in commit 3098dba01c7 ("Use a dedicated function to request exit from execution loop"), tlb_flush() and tb_flush() are related to TCG accelerator. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- cpu-target.c | 33 +++++++++++++++++++-------------- 1 file changed, 19 insertions(+), 14 deletions(-)