[kvm-unit-tests,2/3] x86: Add a macro for the size of the per-CPU stack/data area

Commit Message

Sean Christopherson Feb. 15, 2025, 1:20 a.m. UTC

Add a macro to define the size of the per-CPU stack/data area so that it's
somewhat possible to make sense of the madness.

Signed-off-by: Sean Christopherson <[e-mail]>
---
 lib/x86/apic-defs.h | 6 +++---
 lib/x86/setup.c     | 2 +-
 lib/x86/smp.c       | 2 +-
 x86/cstart.S        | 7 ++++---
 x86/cstart64.S      | 5 +++--
 x86/trampolines.S   | 7 +++++--
 6 files changed, 17 insertions(+), 12 deletions(-)

Patch

diff --git a/lib/x86/apic-defs.h b/lib/x86/apic-defs.h
index 4db73da2..fde1db38 100644
--- a/lib/x86/apic-defs.h
+++ b/lib/x86/apic-defs.h
@@ -2,11 +2,11 @@ 
 #define _X86_APIC_DEFS_H_
 
 /*
- * Abuse this header file to hold the number of max-cpus, making it available
- * both in C and ASM
+ * Abuse this header file to hold the number of max-cpus and the size of the
+ * per-CPU stack/data area, making them available both in C and ASM.
  */
-
 #define MAX_TEST_CPUS (255)
+#define PER_CPU_SIZE  (4096)
 
 /*
  * Constants for various Intel APICs. (local APIC, IOAPIC, etc.)
diff --git a/lib/x86/setup.c b/lib/x86/setup.c
index d509a248..b4b7fec0 100644
--- a/lib/x86/setup.c
+++ b/lib/x86/setup.c
@@ -146,7 +146,7 @@  unsigned long setup_tss(u8 *stacktop)
 	set_gdt_entry(TSS_MAIN + id * 8,
 		      (unsigned long)tss_entry, 0xffff, 0x89, 0);
 	set_gdt_entry(TSS_MAIN + MAX_TEST_CPUS * 8 + id * 8,
-		      (unsigned long)stacktop - 4096, 0xfffff, 0x93, 0xc0);
+		      (unsigned long)stacktop - PER_CPU_SIZE, 0xfffff, 0x93, 0xc0);
 
 	return TSS_MAIN + id * 8;
 }
diff --git a/lib/x86/smp.c b/lib/x86/smp.c
index e297016c..9706072a 100644
--- a/lib/x86/smp.c
+++ b/lib/x86/smp.c
@@ -273,7 +273,7 @@  void bringup_aps(void)
 	setup_rm_gdt();
 
 #ifdef CONFIG_EFI
-	smp_stacktop = ((u64) (&stacktop)) - PAGE_SIZE;
+	smp_stacktop = ((u64) (&stacktop)) - PER_CPU_SIZE;
 #endif
 
 	/* INIT */
diff --git a/x86/cstart.S b/x86/cstart.S
index df3458fe..2e396e52 100644
--- a/x86/cstart.S
+++ b/x86/cstart.S
@@ -5,11 +5,12 @@ 
 
 ipi_vector = 0x20
 
+per_cpu_size = PER_CPU_SIZE
 max_cpus = MAX_TEST_CPUS
 
 .bss
 .align 4096
-	. = . + 4096 * max_cpus
+	. = . + PER_CPU_SIZE * max_cpus
 stacktop:
 
 .data
@@ -81,7 +82,7 @@  prepare_32:
 	mov %eax, %cr0
 	ret
 
-smp_stacktop:	.long stacktop - 4096
+smp_stacktop:	.long stacktop - per_cpu_size
 
 save_id:
 	movl $(APIC_DEFAULT_PHYS_BASE + APIC_ID), %eax
@@ -92,7 +93,7 @@  save_id:
 
 ap_start32:
 	setup_segments
-	mov $-4096, %esp
+	mov $-per_cpu_size, %esp
 	lock xaddl %esp, smp_stacktop
 	setup_tr_and_percpu
 	call prepare_32
diff --git a/x86/cstart64.S b/x86/cstart64.S
index bafb2017..a9db65ce 100644
--- a/x86/cstart64.S
+++ b/x86/cstart64.S
@@ -3,11 +3,12 @@ 
 
 ipi_vector = 0x20
 
+per_cpu_size = PER_CPU_SIZE
 max_cpus = MAX_TEST_CPUS
 
 .bss
 .align 4096
-	. = . + 4096 * max_cpus
+	. = . + PER_CPU_SIZE * max_cpus
 stacktop:
 
 .data
@@ -91,7 +92,7 @@  switch_to_5level:
 	call enter_long_mode
 	jmpl $8, $lvl5
 
-smp_stacktop:	.long stacktop - 4096
+smp_stacktop:	.long stacktop - per_cpu_size
 
 .align 16
 
diff --git a/x86/trampolines.S b/x86/trampolines.S
index 6a3df9c1..02713157 100644
--- a/x86/trampolines.S
+++ b/x86/trampolines.S
@@ -2,6 +2,9 @@ 
  * Common bootstrapping code to transition from 16-bit to 32-bit code, and to
  * transition from 32-bit to 64-bit code (x86-64 only)
  */
+#include "apic-defs.h"
+
+per_cpu_size = PER_CPU_SIZE
 
  /* EFI provides it's own SIPI sequence to handle relocation. */
 #ifndef CONFIG_EFI
@@ -56,7 +59,7 @@  rm_trampoline_end:
 MSR_GS_BASE = 0xc0000101
 
 .macro setup_percpu_area
-	lea -4096(%esp), %eax
+	lea -per_cpu_size(%esp), %eax
 	mov $0, %edx
 	mov $MSR_GS_BASE, %ecx
 	wrmsr
@@ -116,7 +119,7 @@  ap_start32:
 	setup_segments
 
 	load_absolute_addr $smp_stacktop, %edx
-	mov $-4096, %esp
+	mov $-per_cpu_size, %esp
 	lock xaddl %esp, (%edx)
 
 	setup_percpu_area