diff mbox series

[kvm-unit-tests,v1,7/7] arm64: run at EL2 if supported

Message ID 20250220141354.2565567-8-joey.gouly@arm.com (mailing list archive)
State New
Headers show
Series arm64: support EL2 | expand

Commit Message

Joey Gouly Feb. 20, 2025, 2:13 p.m. UTC 
If VHE is supported, continue booting at EL2, otherwise continue booting at
EL1.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
---
 arm/cstart64.S         | 28 ++++++++++++++++++++++++++++
 lib/arm64/asm/sysreg.h |  5 +++++
 2 files changed, 33 insertions(+)

Comments

Marc Zyngier Feb. 20, 2025, 3:34 p.m. UTC | #1 
On Thu, 20 Feb 2025 14:13:54 +0000,
Joey Gouly <joey.gouly@arm.com> wrote:
> 
> If VHE is supported, continue booting at EL2, otherwise continue booting at
> EL1.
> 
> Signed-off-by: Joey Gouly <joey.gouly@arm.com>
> ---
>  arm/cstart64.S         | 28 ++++++++++++++++++++++++++++
>  lib/arm64/asm/sysreg.h |  5 +++++
>  2 files changed, 33 insertions(+)
> 
> diff --git a/arm/cstart64.S b/arm/cstart64.S
> index 3a305ad0..2a15c03d 100644
> --- a/arm/cstart64.S
> +++ b/arm/cstart64.S
> @@ -68,6 +68,20 @@ reloc_done:
>  	mrs	x4, CurrentEL
>  	cmp	x4, CurrentEL_EL2
>  	b.ne	1f
> +	/* EL2 setup */
> +	mrs	x4, mpidr_el1
> +	msr	vmpidr_el2, x4
> +	mrs	x4, midr_el1
> +	msr	vpidr_el2, x4
> +	/* check VHE is supported */
> +	mrs	x4, ID_AA64MMFR1_EL1
> +	ubfx	x4, x4, ID_AA64MMFR1_EL1_VH_SHIFT, #4
> +	cmp	x4, #0
> +	b.eq	drop_to_el1

nit: you can replace these cmp/b.eq with a cbz.

Thanks,

	M.
diff mbox series

Patch

diff --git a/arm/cstart64.S b/arm/cstart64.S
index 3a305ad0..2a15c03d 100644
--- a/arm/cstart64.S
+++ b/arm/cstart64.S
@@ -68,6 +68,20 @@  reloc_done:
 	mrs	x4, CurrentEL
 	cmp	x4, CurrentEL_EL2
 	b.ne	1f
+	/* EL2 setup */
+	mrs	x4, mpidr_el1
+	msr	vmpidr_el2, x4
+	mrs	x4, midr_el1
+	msr	vpidr_el2, x4
+	/* check VHE is supported */
+	mrs	x4, ID_AA64MMFR1_EL1
+	ubfx	x4, x4, ID_AA64MMFR1_EL1_VH_SHIFT, #4
+	cmp	x4, #0
+	b.eq	drop_to_el1
+	ldr	x4, =(HCR_EL2_TGE | HCR_EL2_E2H)
+	msr	hcr_el2, x4
+	isb
+	b	1f
 drop_to_el1:
 	mov	x4, 4
 	msr	spsr_el2, x4
@@ -200,6 +214,20 @@  secondary_entry:
 	mrs	x0, CurrentEL
 	cmp	x0, CurrentEL_EL2
 	b.ne	1f
+	/* EL2 setup */
+	mrs	x0, mpidr_el1
+	msr	vmpidr_el2, x0
+	mrs	x0, midr_el1
+	msr	vpidr_el2, x0
+	/* check VHE is supported */
+	mrs	x0, ID_AA64MMFR1_EL1
+	ubfx	x0, x0, ID_AA64MMFR1_EL1_VH_SHIFT, #4
+	cmp	x0, #0
+	b.eq	drop_to_el1
+	ldr	x0, =(HCR_EL2_TGE | HCR_EL2_E2H)
+	msr	hcr_el2, x0
+	isb
+	b	1f
 drop_to_el1_secondary:
 	mov	x0, 4
 	msr	spsr_el2, x0
diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h
index f214a4f0..d99ab5ec 100644
--- a/lib/arm64/asm/sysreg.h
+++ b/lib/arm64/asm/sysreg.h
@@ -75,6 +75,8 @@  asm(
 
 #define ID_AA64ISAR0_EL1_RNDR_SHIFT	60
 
+#define ID_AA64MMFR1_EL1_VH_SHIFT	8
+
 #define ICC_PMR_EL1			sys_reg(3, 0, 4, 6, 0)
 #define ICC_SGI1R_EL1			sys_reg(3, 0, 12, 11, 5)
 #define ICC_IAR1_EL1			sys_reg(3, 0, 12, 12, 0)
@@ -99,6 +101,9 @@  asm(
 #define SCTLR_EL1_A		_BITULL(1)
 #define SCTLR_EL1_M		_BITULL(0)
 
+#define HCR_EL2_TGE    _BITULL(27)
+#define HCR_EL2_E2H    _BITULL(34)
+
 #define INIT_SCTLR_EL1_MMU_OFF	\
 			(SCTLR_EL1_ITD | SCTLR_EL1_SED | SCTLR_EL1_EOS | \
 			 SCTLR_EL1_TSCXT | SCTLR_EL1_EIS | SCTLR_EL1_SPAN | \