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[RFC,03/19] KVM: x86: Convert guest_apic_protected bool to an enum type

Message ID 20250228085115.105648-4-Neeraj.Upadhyay@amd.com (mailing list archive)
State New
Headers show
Series AMD: Add Secure AVIC KVM Support | expand

Commit Message

Neeraj Upadhyay Feb. 28, 2025, 8:50 a.m. UTC 
Convert guest_apic_protected lapic struct member to an enum..
This allows to categorize guest APIC state protection according
to the KVM interrupt delivery mechanism.

This is used to distinguish between SNP Secure AVIC's interrupt
injection-based interrupt delivery and TDX's posted interrupt
delivery mechanism. Use value 0 to indicate unprotected APIC
so that functions like kvm_cpu_has_interrupt(), which require
KVM to call an arch-specific callback to determine whether
there are any interrupts that need to be delivered to the vCPU,
can still use non-zero guest_apic_protected check. Subsequent
patches for Secure AVIC-specific interrupt injection checks
will need to use specific guest_apic_protected value.

Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
---
 arch/x86/kvm/lapic.h | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)
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Patch

diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index e33c969439f7..c9ef9bce438b 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -55,6 +55,12 @@  struct kvm_timer {
 	bool hv_timer_in_use;
 };
 
+enum kvm_apic_protection {
+	APIC_STATE_UNPROTECTED,
+	APIC_STATE_PROTECTED_POSTED_INTR,
+	APIC_STATE_PROTECTED_INJECTED_INTR,
+};
+
 struct kvm_lapic {
 	unsigned long base_address;
 	struct kvm_io_device dev;
@@ -66,7 +72,7 @@  struct kvm_lapic {
 	bool irr_pending;
 	bool lvt0_in_nmi_mode;
 	/* Select registers in the vAPIC cannot be read/written. */
-	bool guest_apic_protected;
+	enum kvm_apic_protection guest_apic_protected;
 	/* Number of bits set in ISR. */
 	s16 isr_count;
 	/* The highest vector set in ISR; if -1 - invalid, must scan ISR. */