From patchwork Fri Jun 23 10:40:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Xu, Haibo1" X-Patchwork-Id: 13290346 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ACDDBEB64D7 for ; Fri, 23 Jun 2023 10:37:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231267AbjFWKhT (ORCPT ); Fri, 23 Jun 2023 06:37:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229451AbjFWKg5 (ORCPT ); Fri, 23 Jun 2023 06:36:57 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEA342968; Fri, 23 Jun 2023 03:36:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1687516589; x=1719052589; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=d9hxFxP3+aBRBc+Ceyr9PCiVTSv/k2Q6TXUwS8frSIo=; b=FNDW5Uv7uS0EQ5tXmYgO3+KVGdkpqj9xD9tEu9jPiIQ4gq01pX9GoQZG 5lKfooi9MNp1JoHwcSQueutFhanLu6Yut6QZwsiezfTD5A+8wYcWjTYGj A1Aq0vXyUV3T3jwGXA4kSrTu2Y1U7A3p4082bUnjupFMZWYo/m1qhfqEK iZw7xoVzjyPsd3ZXRbcXMVyVqEEIv9/4/b86iJiQnBR4UZefWmlgquJDL MRaGAIdoKPc1yvWRc6EoDsUgAWSnNtzJb3dj+Qi7sDBtIi9V9/vI1UK2p IaDy0k8+48QJlNX4b6ygFz3tN4iya2Dt7XV96V/5CB8AgwiT0LN+GQ5ln g==; X-IronPort-AV: E=McAfee;i="6600,9927,10749"; a="447112630" X-IronPort-AV: E=Sophos;i="6.01,151,1684825200"; d="scan'208";a="447112630" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2023 03:36:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10749"; a="715276142" X-IronPort-AV: E=Sophos;i="6.01,151,1684825200"; d="scan'208";a="715276142" Received: from haibo-optiplex-7090.sh.intel.com ([10.239.159.132]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2023 03:36:20 -0700 From: Haibo Xu Cc: xiaobo55x@gmail.com, haibo1.xu@intel.com, ajones@ventanamicro.com, maz@kernel.org, oliver.upton@linux.dev, seanjc@google.com, Paolo Bonzini , Jonathan Corbet , Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou , Shuah Khan , James Morse , Suzuki K Poulose , Zenghui Yu , David Matlack , Ben Gardon , Ricardo Koller , Vishal Annapurve , Vipin Sharma , Colton Lewis , kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Subject: [PATCH v4 08/12] KVM: arm64: selftests: Move reject_set check logic to a function Date: Fri, 23 Jun 2023 18:40:10 +0800 Message-Id: <341feff384c9f8a20ed4aac6e2dda0440d6b84f2.1687515463.git.haibo1.xu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org No functional changes. Just move the reject_set check logic to a function so we can check for specific errno for specific register. This is a preparation for support reject_set in riscv. Suggested-by: Andrew Jones Signed-off-by: Haibo Xu --- tools/testing/selftests/kvm/aarch64/get-reg-list.c | 8 ++++++++ tools/testing/selftests/kvm/get-reg-list.c | 7 ++++++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/aarch64/get-reg-list.c b/tools/testing/selftests/kvm/aarch64/get-reg-list.c index aaf035c969ec..4e2e1fe833eb 100644 --- a/tools/testing/selftests/kvm/aarch64/get-reg-list.c +++ b/tools/testing/selftests/kvm/aarch64/get-reg-list.c @@ -27,6 +27,14 @@ bool filter_reg(__u64 reg) return false; } +bool reject_set_fail(__u64 reg) +{ + if (reg == KVM_REG_ARM64_SVE_VLS) + return (errno != EPERM); + + return false; +} + #define REG_MASK (KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_COPROC_MASK) #define CORE_REGS_XX_NR_WORDS 2 diff --git a/tools/testing/selftests/kvm/get-reg-list.c b/tools/testing/selftests/kvm/get-reg-list.c index f6ad7991a812..b956ee410996 100644 --- a/tools/testing/selftests/kvm/get-reg-list.c +++ b/tools/testing/selftests/kvm/get-reg-list.c @@ -98,6 +98,11 @@ void __weak print_reg(const char *prefix, __u64 id) printf("\t0x%llx,\n", id); } +bool __weak reject_set_fail(__u64 reg) +{ + return false; +} + #ifdef __aarch64__ static void prepare_vcpu_init(struct vcpu_reg_list *c, struct kvm_vcpu_init *init) { @@ -216,7 +221,7 @@ static void run_test(struct vcpu_reg_list *c) if (s->rejects_set && find_reg(s->rejects_set, s->rejects_set_n, reg.id)) { reject_reg = true; ret = __vcpu_ioctl(vcpu, KVM_SET_ONE_REG, ®); - if (ret != -1 || errno != EPERM) { + if (ret != -1 || reject_set_fail(reg.id)) { printf("%s: Failed to reject (ret=%d, errno=%d) ", config_name(c), ret, errno); print_reg(config_name(c), reg.id); putchar('\n');