From patchwork Fri Jul 23 04:59:49 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiao Guangrong X-Patchwork-Id: 113828 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o6N544eN022559 for ; Fri, 23 Jul 2010 05:04:04 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752663Ab0GWFD4 (ORCPT ); Fri, 23 Jul 2010 01:03:56 -0400 Received: from cn.fujitsu.com ([222.73.24.84]:53706 "EHLO song.cn.fujitsu.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1752507Ab0GWFDz (ORCPT ); Fri, 23 Jul 2010 01:03:55 -0400 Received: from tang.cn.fujitsu.com (tang.cn.fujitsu.com [10.167.250.3]) by song.cn.fujitsu.com (Postfix) with ESMTP id D753817012A; Fri, 23 Jul 2010 13:03:52 +0800 (CST) Received: from fnst.cn.fujitsu.com (tang.cn.fujitsu.com [127.0.0.1]) by tang.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id o6N510ob002939; Fri, 23 Jul 2010 13:01:00 +0800 Received: from [10.167.141.99] (unknown [10.167.141.99]) by fnst.cn.fujitsu.com (Postfix) with ESMTPA id 4C17D10C1CB; Fri, 23 Jul 2010 13:04:25 +0800 (CST) Message-ID: <4C4921C5.4090809@cn.fujitsu.com> Date: Fri, 23 Jul 2010 12:59:49 +0800 From: Xiao Guangrong User-Agent: Thunderbird 2.0.0.24 (Windows/20100228) MIME-Version: 1.0 To: Avi Kivity CC: Marcelo Tosatti , KVM list Subject: [PATCH 1/3] KVM test: separate expect status updates from ac_test_setup_pte() function Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Fri, 23 Jul 2010 05:04:04 +0000 (UTC) diff --git a/kvm/test/x86/access.c b/kvm/test/x86/access.c index 3338fbc..c7d7e29 100644 --- a/kvm/test/x86/access.c +++ b/kvm/test/x86/access.c @@ -302,72 +302,12 @@ void ac_test_reset_pt_pool(ac_test_t *at) at->pt_pool_current = 0; } -void ac_test_setup_pte(ac_test_t *at) +void ac_set_expected_status(ac_test_t *at) { - unsigned long root = read_cr3(); int pde_valid, pte_valid; - if (!ac_test_enough_room(at)) - ac_test_reset_pt_pool(at); - - at->ptep = 0; - for (int i = 4; i >= 1 && (i >= 2 || !at->flags[AC_PDE_PSE]); --i) { - pt_element_t *vroot = va(root & PT_BASE_ADDR_MASK); - unsigned index = ((unsigned long)at->virt >> (12 + (i-1) * 9)) & 511; - pt_element_t pte = 0; - switch (i) { - case 4: - case 3: - pte = vroot[index]; - pte = ac_test_alloc_pt(at) | PT_PRESENT_MASK; - pte |= PT_WRITABLE_MASK | PT_USER_MASK; - break; - case 2: - if (!at->flags[AC_PDE_PSE]) - pte = ac_test_alloc_pt(at); - else { - pte = at->phys & PT_PSE_BASE_ADDR_MASK; - pte |= PT_PSE_MASK; - } - if (at->flags[AC_PDE_PRESENT]) - pte |= PT_PRESENT_MASK; - if (at->flags[AC_PDE_WRITABLE]) - pte |= PT_WRITABLE_MASK; - if (at->flags[AC_PDE_USER]) - pte |= PT_USER_MASK; - if (at->flags[AC_PDE_ACCESSED]) - pte |= PT_ACCESSED_MASK; - if (at->flags[AC_PDE_DIRTY]) - pte |= PT_DIRTY_MASK; - if (at->flags[AC_PDE_NX]) - pte |= PT_NX_MASK; - if (at->flags[AC_PDE_BIT51]) - pte |= 1ull << 51; - at->pdep = &vroot[index]; - break; - case 1: - pte = at->phys & PT_BASE_ADDR_MASK; - if (at->flags[AC_PTE_PRESENT]) - pte |= PT_PRESENT_MASK; - if (at->flags[AC_PTE_WRITABLE]) - pte |= PT_WRITABLE_MASK; - if (at->flags[AC_PTE_USER]) - pte |= PT_USER_MASK; - if (at->flags[AC_PTE_ACCESSED]) - pte |= PT_ACCESSED_MASK; - if (at->flags[AC_PTE_DIRTY]) - pte |= PT_DIRTY_MASK; - if (at->flags[AC_PTE_NX]) - pte |= PT_NX_MASK; - if (at->flags[AC_PTE_BIT51]) - pte |= 1ull << 51; - at->ptep = &vroot[index]; - break; - } - vroot[index] = pte; - root = vroot[index]; - } invlpg(at->virt); + if (at->ptep) at->expected_pte = *at->ptep; at->expected_pde = *at->pdep; @@ -467,6 +407,73 @@ fault: at->expected_error &= ~PFERR_FETCH_MASK; } +void ac_test_setup_pte(ac_test_t *at) +{ + unsigned long root = read_cr3(); + + if (!ac_test_enough_room(at)) + ac_test_reset_pt_pool(at); + + at->ptep = 0; + for (int i = 4; i >= 1 && (i >= 2 || !at->flags[AC_PDE_PSE]); --i) { + pt_element_t *vroot = va(root & PT_BASE_ADDR_MASK); + unsigned index = ((unsigned long)at->virt >> (12 + (i-1) * 9)) & 511; + pt_element_t pte = 0; + switch (i) { + case 4: + case 3: + pte = vroot[index]; + pte = ac_test_alloc_pt(at) | PT_PRESENT_MASK; + pte |= PT_WRITABLE_MASK | PT_USER_MASK; + break; + case 2: + if (!at->flags[AC_PDE_PSE]) + pte = ac_test_alloc_pt(at); + else { + pte = at->phys & PT_PSE_BASE_ADDR_MASK; + pte |= PT_PSE_MASK; + } + if (at->flags[AC_PDE_PRESENT]) + pte |= PT_PRESENT_MASK; + if (at->flags[AC_PDE_WRITABLE]) + pte |= PT_WRITABLE_MASK; + if (at->flags[AC_PDE_USER]) + pte |= PT_USER_MASK; + if (at->flags[AC_PDE_ACCESSED]) + pte |= PT_ACCESSED_MASK; + if (at->flags[AC_PDE_DIRTY]) + pte |= PT_DIRTY_MASK; + if (at->flags[AC_PDE_NX]) + pte |= PT_NX_MASK; + if (at->flags[AC_PDE_BIT51]) + pte |= 1ull << 51; + at->pdep = &vroot[index]; + break; + case 1: + pte = at->phys & PT_BASE_ADDR_MASK; + if (at->flags[AC_PTE_PRESENT]) + pte |= PT_PRESENT_MASK; + if (at->flags[AC_PTE_WRITABLE]) + pte |= PT_WRITABLE_MASK; + if (at->flags[AC_PTE_USER]) + pte |= PT_USER_MASK; + if (at->flags[AC_PTE_ACCESSED]) + pte |= PT_ACCESSED_MASK; + if (at->flags[AC_PTE_DIRTY]) + pte |= PT_DIRTY_MASK; + if (at->flags[AC_PTE_NX]) + pte |= PT_NX_MASK; + if (at->flags[AC_PTE_BIT51]) + pte |= 1ull << 51; + at->ptep = &vroot[index]; + break; + } + vroot[index] = pte; + root = vroot[index]; + } + ac_set_expected_status(at); +} + static void ac_test_check(ac_test_t *at, _Bool *success_ret, _Bool cond, const char *fmt, ...) {