From patchwork Tue Jun 17 12:14:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 4366001 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 104F99F26E for ; Tue, 17 Jun 2014 12:14:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2DC6A202FE for ; Tue, 17 Jun 2014 12:14:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2B4FA202F2 for ; Tue, 17 Jun 2014 12:14:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932599AbaFQMOk (ORCPT ); Tue, 17 Jun 2014 08:14:40 -0400 Received: from cantor2.suse.de ([195.135.220.15]:50361 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932196AbaFQMOk (ORCPT ); Tue, 17 Jun 2014 08:14:40 -0400 Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 3269CAABA; Tue, 17 Jun 2014 12:14:38 +0000 (UTC) Message-ID: <53A0312D.8090607@suse.de> Date: Tue, 17 Jun 2014 14:14:37 +0200 From: Alexander Graf User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.9; rv:24.0) Gecko/20100101 Thunderbird/24.6.0 MIME-Version: 1.0 To: Paul Mackerras CC: kvm-ppc@vger.kernel.org, kvm@vger.kernel.org, anton@samba.org Subject: Re: [PATCH 5/6] KVM: PPC: Book3S HV: Access XICS in BE References: <1402482831-8941-1-git-send-email-agraf@suse.de> <1402482831-8941-6-git-send-email-agraf@suse.de> <20140617010204.GB16554@iris.ozlabs.ibm.com> <539FFE39.1000701@suse.de> <53A016E8.1060401@suse.de> <20140617121322.GB8790@iris.ozlabs.ibm.com> In-Reply-To: <20140617121322.GB8790@iris.ozlabs.ibm.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 17.06.14 14:13, Paul Mackerras wrote: > On Tue, Jun 17, 2014 at 12:22:32PM +0200, Alexander Graf wrote: >> Eh, no. What we do is we read (good on BE, byte reversed) into r0. Then we >> swab32() from r0 to r3 on LE, mr from r0 to r3 on BE. >> >> r3 gets truncated along the way. >> >> The reason we maintain r0 as wrong-endian is that we write it back using the >> cache inhibited stwcix instruction: >> >>> stwcix r0, r6, r7 /* EOI it */ >> So during the lifetime of r0 as XIRR it's always byte-reversed on LE. That's >> why we store it using STWX_BE into hstate, because that's the time when we >> actually swab32() it for further interpretation. > So the STWX_BE is more like a be32_to_cpu than a cpu_to_be32, which is > what the name STWX_BE would suggest. Sounds like it at least deserves > a comment, or (as you suggest) rearrange the register usage so a > normal store works. Yes, I have this now: From a94a66437ec714ec5650f6d8fec050a33e4477ca Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Wed, 11 Jun 2014 10:37:52 +0200 Subject: [PATCH] KVM: PPC: Book3S HV: Access XICS in BE On the exit path from the guest we check what type of interrupt we received if we received one. This means we're doing hardware access to the XICS interrupt controller. However, when running on a little endian system, this access is byte reversed. So let's make sure to swizzle the bytes back again and virtually make XICS accesses big endian. Signed-off-by: Alexander Graf --- v1 -> v2: - Make code easier to follow Alex -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S index 1a2f471..9829e18 100644 --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S @@ -36,6 +36,13 @@ #define NAPPING_CEDE 1 #define NAPPING_NOVCPU 2 +.macro bswap32 regd, regs + srwi \regd,\regs,24 + rlwimi \regd,\regs,24,16,23 + rlwimi \regd,\regs,8,8,15 + rlwimi \regd,\regs,24,0,7 +.endm + /* * Call kvmppc_hv_entry in real mode. * Must be called with interrupts hard-disabled. @@ -2325,7 +2332,12 @@ kvmppc_read_intr: cmpdi r6, 0 beq- 1f lwzcix r0, r6, r7 - rlwinm. r3, r0, 0, 0xffffff +#ifdef __LITTLE_ENDIAN__ + bswap32 r4, r0 +#else + mr r4, r0 +#endif + rlwinm. r3, r4, 0, 0xffffff sync beq 1f /* if nothing pending in the ICP */ @@ -2360,7 +2372,7 @@ kvmppc_read_intr: 42: /* It's not an IPI and it's for the host, stash it in the PACA * before exit, it will be picked up by the host ICP driver */ - stw r0, HSTATE_SAVED_XIRR(r13) + stw r4, HSTATE_SAVED_XIRR(r13) li r3, 1 b 1b