From patchwork Mon Dec 22 09:01:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tiejun Chen X-Patchwork-Id: 5526321 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4B4289F326 for ; Mon, 22 Dec 2014 09:01:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0DB2A20173 for ; Mon, 22 Dec 2014 09:01:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E789920172 for ; Mon, 22 Dec 2014 09:01:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754080AbaLVJBQ (ORCPT ); Mon, 22 Dec 2014 04:01:16 -0500 Received: from mga09.intel.com ([134.134.136.24]:50977 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753977AbaLVJBP (ORCPT ); Mon, 22 Dec 2014 04:01:15 -0500 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP; 22 Dec 2014 00:59:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,691,1406617200"; d="scan'208";a="502518174" Received: from tiejunch-mobl.ccr.corp.intel.com (HELO [10.238.130.73]) ([10.238.130.73]) by orsmga003.jf.intel.com with ESMTP; 22 Dec 2014 00:56:38 -0800 Message-ID: <5497DDD9.4000300@intel.com> Date: Mon, 22 Dec 2014 17:01:13 +0800 From: "Chen, Tiejun" User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:31.0) Gecko/20100101 Thunderbird/31.3.0 MIME-Version: 1.0 To: Paolo Bonzini CC: kvm@vger.kernel.org Subject: Re: [PATCH] kvm: x86: remove vmx_vm_has_apicv() outside of hwapic_isr_update() References: <1417426124-9685-1-git-send-email-tiejun.chen@intel.com> <547C5477.7030101@redhat.com> <54938E4F.7060105@intel.com> <5494081A.7020601@redhat.com> In-Reply-To: <5494081A.7020601@redhat.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 2014/12/19 19:12, Paolo Bonzini wrote: > > > On 19/12/2014 03:32, Chen, Tiejun wrote: >> >> Are you saying something below? >> >> if (enable_apicv) >> ... >> else { >> kvm_x86_ops->hwapic_irr_update = NULL; > > Yes. > >> But this means we have to revise hadware_setup() to get 'kvm' inside, > > This would not even be possible, since hardware_setup() is only called once. Yeah. > > However, for the only caller of hwapic_isr_update (but presumably all of > them, as is the case for hwapic_irr_update), you already know that There are two other callers to hwapic_isr_update(), apic_set_isr() and apic_clear_isr(), but I think they still work here. > irqchip_in_kernel(kvm) is true. You are in kvm_apic_post_state_restore, > which takes a kvm_lapic_state, and no lapic exists if > !irqchip_in_kernel(kvm). > > (Yes, irqchip_in_kernel) is a bit weird and tests pic_irqchip(kvm) > instead, but it's the same. It tests pic_irqchip(kvm) only because the > LAPIC is per-cpu and irqchip_in_kernel takes a struct kvm). > > So it's possible to NULL out hwapic_isr_update in hardware_setup. It > simply shouldn't happen that you call hwapic_isr_update without the > in-kernel irqchip. The kernel knows nothing about ISR/IRR without the > in-kernel irqchip. Thanks for your kind elaboration which always benefits me. What about this revision as follows? kvm: x86: vmx: NULL out hwapic_isr_update() in case of !enable_apicv In most cases calling hwapic_isr_update(), we always check if kvm_apic_vid_enabled() == 1, but actually, kvm_apic_vid_enabled() -> kvm_x86_ops->vm_has_apicv() -> vmx_vm_has_apicv() or '0' in svm case -> return enable_apicv && irqchip_in_kernel(kvm) So its a little cost to recall vmx_vm_has_apicv() inside hwapic_isr_update(), here just NULL out hwapic_isr_update() in case of !enable_apicv inside hardware_setup() then make all related stuffs follow this. Note we don't check this under that condition of irqchip_in_kernel() since we should make sure definitely any caller don't work without in-kernel irqchip. Signed-off-by: Tiejun Chen --- arch/x86/kvm/lapic.c | 7 ++++--- arch/x86/kvm/vmx.c | 4 +--- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 4f0c0b9..eb4cd5e 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -402,7 +402,7 @@ static inline void apic_set_isr(int vec, struct kvm_lapic *apic) * because the processor can modify ISR under the hood. Instead * just set SVI. */ - if (unlikely(kvm_apic_vid_enabled(vcpu->kvm))) + if (unlikely(kvm_x86_ops->hwapic_isr_update)) kvm_x86_ops->hwapic_isr_update(vcpu->kvm, vec); else { ++apic->isr_count; @@ -450,7 +450,7 @@ static inline void apic_clear_isr(int vec, struct kvm_lapic *apic) * on the other hand isr_count and highest_isr_cache are unused * and must be left alone. */ - if (unlikely(kvm_apic_vid_enabled(vcpu->kvm))) + if (unlikely(kvm_x86_ops->hwapic_isr_update)) kvm_x86_ops->hwapic_isr_update(vcpu->kvm, apic_find_highest_isr(apic)); else { @@ -1742,7 +1742,8 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu, if (kvm_x86_ops->hwapic_irr_update) kvm_x86_ops->hwapic_irr_update(vcpu, apic_find_highest_irr(apic)); - kvm_x86_ops->hwapic_isr_update(vcpu->kvm, apic_find_highest_isr(apic)); + if (kvm_x86_ops->hwapic_isr_update) + kvm_x86_ops->hwapic_isr_update(vcpu->kvm, apic_find_highest_isr(apic)); kvm_make_request(KVM_REQ_EVENT, vcpu); kvm_rtc_eoi_tracking_restore_one(vcpu); } diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 96c84a8..e378dff 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -5895,6 +5895,7 @@ static __init int hardware_setup(void) kvm_x86_ops->update_cr8_intercept = NULL; else { kvm_x86_ops->hwapic_irr_update = NULL; + kvm_x86_ops->hwapic_isr_update = NULL; kvm_x86_ops->deliver_posted_interrupt = NULL; kvm_x86_ops->sync_pir_to_irr = vmx_sync_pir_to_irr_dummy; } @@ -7471,9 +7472,6 @@ static void vmx_hwapic_isr_update(struct kvm *kvm, int isr) u16 status; u8 old; - if (!vmx_vm_has_apicv(kvm)) - return; - if (isr == -1) isr = 0;