Message ID | 5a23890a36c31896addfd41bae9211545024f8ba.1610935432.git.kai.huang@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM SGX virtualization support | expand |
On Mon, Jan 18, 2021 at 04:27:50PM +1300, Kai Huang wrote: > From: Sean Christopherson <sean.j.christopherson@intel.com> > > Move the ENCLS leaf definitions to sgx_arch.h so that they can be used > by KVM. And because they're architectural. > > Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> > Acked-by: Dave Hansen <dave.hansen@intel.com> > Signed-off-by: Kai Huang <kai.huang@intel.com> Acked-by: Jarkko Sakkinen <jarkko@kernel.org> /Jarkko > --- > arch/x86/include/asm/sgx_arch.h | 15 +++++++++++++++ > arch/x86/kernel/cpu/sgx/encls.h | 15 --------------- > 2 files changed, 15 insertions(+), 15 deletions(-) > > diff --git a/arch/x86/include/asm/sgx_arch.h b/arch/x86/include/asm/sgx_arch.h > index 56b0f8ae3f92..38ef7ce3d3c7 100644 > --- a/arch/x86/include/asm/sgx_arch.h > +++ b/arch/x86/include/asm/sgx_arch.h > @@ -22,6 +22,21 @@ > /* The bitmask for the EPC section type. */ > #define SGX_CPUID_EPC_MASK GENMASK(3, 0) > > +enum sgx_encls_function { > + ECREATE = 0x00, > + EADD = 0x01, > + EINIT = 0x02, > + EREMOVE = 0x03, > + EDGBRD = 0x04, > + EDGBWR = 0x05, > + EEXTEND = 0x06, > + ELDU = 0x08, > + EBLOCK = 0x09, > + EPA = 0x0A, > + EWB = 0x0B, > + ETRACK = 0x0C, > +}; > + > /** > * enum sgx_return_code - The return code type for ENCLS, ENCLU and ENCLV > * %SGX_NOT_TRACKED: Previous ETRACK's shootdown sequence has not > diff --git a/arch/x86/kernel/cpu/sgx/encls.h b/arch/x86/kernel/cpu/sgx/encls.h > index 443188fe7e70..be5c49689980 100644 > --- a/arch/x86/kernel/cpu/sgx/encls.h > +++ b/arch/x86/kernel/cpu/sgx/encls.h > @@ -11,21 +11,6 @@ > #include <asm/traps.h> > #include "sgx.h" > > -enum sgx_encls_function { > - ECREATE = 0x00, > - EADD = 0x01, > - EINIT = 0x02, > - EREMOVE = 0x03, > - EDGBRD = 0x04, > - EDGBWR = 0x05, > - EEXTEND = 0x06, > - ELDU = 0x08, > - EBLOCK = 0x09, > - EPA = 0x0A, > - EWB = 0x0B, > - ETRACK = 0x0C, > -}; > - > /** > * ENCLS_FAULT_FLAG - flag signifying an ENCLS return code is a trapnr > * > -- > 2.29.2 > >
diff --git a/arch/x86/include/asm/sgx_arch.h b/arch/x86/include/asm/sgx_arch.h index 56b0f8ae3f92..38ef7ce3d3c7 100644 --- a/arch/x86/include/asm/sgx_arch.h +++ b/arch/x86/include/asm/sgx_arch.h @@ -22,6 +22,21 @@ /* The bitmask for the EPC section type. */ #define SGX_CPUID_EPC_MASK GENMASK(3, 0) +enum sgx_encls_function { + ECREATE = 0x00, + EADD = 0x01, + EINIT = 0x02, + EREMOVE = 0x03, + EDGBRD = 0x04, + EDGBWR = 0x05, + EEXTEND = 0x06, + ELDU = 0x08, + EBLOCK = 0x09, + EPA = 0x0A, + EWB = 0x0B, + ETRACK = 0x0C, +}; + /** * enum sgx_return_code - The return code type for ENCLS, ENCLU and ENCLV * %SGX_NOT_TRACKED: Previous ETRACK's shootdown sequence has not diff --git a/arch/x86/kernel/cpu/sgx/encls.h b/arch/x86/kernel/cpu/sgx/encls.h index 443188fe7e70..be5c49689980 100644 --- a/arch/x86/kernel/cpu/sgx/encls.h +++ b/arch/x86/kernel/cpu/sgx/encls.h @@ -11,21 +11,6 @@ #include <asm/traps.h> #include "sgx.h" -enum sgx_encls_function { - ECREATE = 0x00, - EADD = 0x01, - EINIT = 0x02, - EREMOVE = 0x03, - EDGBRD = 0x04, - EDGBWR = 0x05, - EEXTEND = 0x06, - ELDU = 0x08, - EBLOCK = 0x09, - EPA = 0x0A, - EWB = 0x0B, - ETRACK = 0x0C, -}; - /** * ENCLS_FAULT_FLAG - flag signifying an ENCLS return code is a trapnr *