From patchwork Mon Jul 9 14:42:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 1173431 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 7EEF440B31 for ; Mon, 9 Jul 2012 14:50:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754689Ab2GIOmq (ORCPT ); Mon, 9 Jul 2012 10:42:46 -0400 Received: from goliath.siemens.de ([192.35.17.28]:21386 "EHLO goliath.siemens.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754482Ab2GIOmn (ORCPT ); Mon, 9 Jul 2012 10:42:43 -0400 Received: from mail1.siemens.de (localhost [127.0.0.1]) by goliath.siemens.de (8.13.6/8.13.6) with ESMTP id q69EgXDu025249; Mon, 9 Jul 2012 16:42:33 +0200 Received: from mchn199C.mchp.siemens.de ([139.25.109.49]) by mail1.siemens.de (8.13.6/8.13.6) with ESMTP id q69EgWkB022363; Mon, 9 Jul 2012 16:42:33 +0200 From: Jan Kiszka To: qemu-devel Cc: kvm , Avi Kivity , Marcelo Tosatti , Gleb Natapov , Anthony Liguori Subject: [PATCH 2/3] apic: Reevaluate pending interrupts on LVT_LINT0 changes Date: Mon, 9 Jul 2012 16:42:31 +0200 Message-Id: <6aaad7826bbe206bffbc8668b8fd3dce7c211452.1341844944.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When the guest modifies the LVT_LINT0 register, we need to check if some pending PIC interrupt can now be delivered. Signed-off-by: Jan Kiszka --- hw/apic.c | 18 ++++++++++++++---- 1 files changed, 14 insertions(+), 4 deletions(-) diff --git a/hw/apic.c b/hw/apic.c index e65a35f..5b8f3e8 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -532,6 +532,15 @@ static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode, apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode); } +static bool apic_check_pic(APICCommonState *s) +{ + if (!apic_accept_pic_intr(&s->busdev.qdev) || !pic_get_output(isa_pic)) { + return false; + } + apic_deliver_pic_intr(&s->busdev.qdev, 1); + return true; +} + int apic_get_interrupt(DeviceState *d) { APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); @@ -559,9 +568,7 @@ int apic_get_interrupt(DeviceState *d) apic_sync_vapic(s, SYNC_TO_VAPIC); /* re-inject if there is still a pending PIC interrupt */ - if (apic_accept_pic_intr(&s->busdev.qdev) && pic_get_output(isa_pic)) { - apic_deliver_pic_intr(&s->busdev.qdev, 1); - } + apic_check_pic(s); apic_update_irq(s); @@ -804,8 +811,11 @@ static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) { int n = index - 0x32; s->lvt[n] = val; - if (n == APIC_LVT_TIMER) + if (n == APIC_LVT_TIMER) { apic_timer_update(s, qemu_get_clock_ns(vm_clock)); + } else if (n == APIC_LVT_LINT0 && apic_check_pic(s)) { + apic_update_irq(s); + } } break; case 0x38: