From patchwork Fri Jul 30 17:22:59 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Jinsong" X-Patchwork-Id: 115567 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o6UHP7iN023900 for ; Fri, 30 Jul 2010 17:26:58 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759007Ab0G3RX0 (ORCPT ); Fri, 30 Jul 2010 13:23:26 -0400 Received: from mga14.intel.com ([143.182.124.37]:31267 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758756Ab0G3RXL (ORCPT ); Fri, 30 Jul 2010 13:23:11 -0400 Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga102.ch.intel.com with ESMTP; 30 Jul 2010 10:23:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.55,288,1278313200"; d="scan'208";a="306400615" Received: from pgsmsx602.gar.corp.intel.com ([10.221.43.81]) by azsmga001.ch.intel.com with ESMTP; 30 Jul 2010 10:23:00 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.239.4.112) by pgsmsx602.gar.corp.intel.com (10.221.43.81) with Microsoft SMTP Server (TLS) id 8.2.254.0; Sat, 31 Jul 2010 01:23:01 +0800 Received: from shsmsx502.ccr.corp.intel.com ([10.239.4.96]) by shsmsx601.ccr.corp.intel.com ([10.239.4.112]) with mapi; Sat, 31 Jul 2010 01:23:00 +0800 From: "Liu, Jinsong" To: "Kevin O'Connor" CC: "seabios@seabios.org" , "kvm@vger.kernel.org" , "Liu, Jinsong" , "Jiang, Yunhong" , "Li, Xin" , "Zheng, Shaohui" , "Zhang, Jianwu" , "You, Yongkang" Date: Sat, 31 Jul 2010 01:22:59 +0800 Subject: RE: Alt SeaBIOS SSDT cpu hotplug Thread-Topic: Alt SeaBIOS SSDT cpu hotplug Thread-Index: AcsrWp/DHkxupVCdTPWFVO/aThD+GgAWW3OgARV3PwA= Message-ID: References: <20100707045705.GA3427@morn.localdomain> <4C3451D9.4080705@redhat.com> <20100709053507.GA15148@morn.localdomain> <20100724180408.GA19905@morn.localdomain> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Fri, 30 Jul 2010 17:26:58 +0000 (UTC) diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl index cc31112..24674fc 100644 --- a/src/acpi-dsdt.dsl +++ b/src/acpi-dsdt.dsl @@ -648,6 +648,78 @@ DefinitionBlock ( Zero /* reserved */ }) + /* CPU hotplug */ + Scope(\_SB) { + /* Objects filled in by run-time generated SSDT */ + External(NTFY, MethodObj) + External(CPON, PkgObj) + + /* Methods called by run-time generated SSDT Processor objects */ + Method (CPMA, 1, NotSerialized) { + // _MAT method - create an madt apic buffer + // Local0 = CPON flag for this cpu + Store(DerefOf(Index(CPON, Arg0)), Local0) + // Local1 = Buffer (in madt apic form) to return + Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1) + // Update the processor id, lapic id, and enable/disable status + Store(Arg0, Index(Local1, 2)) + Store(Arg0, Index(Local1, 3)) + Store(Local0, Index(Local1, 4)) + Return (Local1) + } + Method (CPST, 1, NotSerialized) { + // _STA method - return ON status of cpu + // Local0 = CPON flag for this cpu + Store(DerefOf(Index(CPON, Arg0)), Local0) + If (Local0) { Return(0xF) } Else { Return(0x0) } + } + Method (CPEJ, 2, NotSerialized) { + // _EJ0 method - eject callback + Sleep (0xC8) + } + + /* CPU hotplug notify method */ + OperationRegion(PRST, SystemIO, 0xaf00, 32) + Field (PRST, ByteAcc, NoLock, Preserve) + { + PRS, 256 + } + Method(PRSC, 0) { + // Local5 = active cpu bitmap + Store (PRS, Local5) + // Local2 = last read byte from bitmap + Store (Zero, Local2) + // Local0 = cpuid iterator + Store (Zero, Local0) + While (LLess(Local0, SizeOf(CPON))) { + // Local1 = CPON flag for this cpu + Store(DerefOf(Index(CPON, Local0)), Local1) + If (And(Local0, 0x07)) { + // Shift down previously read bitmap byte + ShiftRight(Local2, 1, Local2) + } Else { + // Read next byte from cpu bitmap + Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2) + } + // Local3 = active state for this cpu + Store(And(Local2, 1), Local3) + + If (LNotEqual(Local1, Local3)) { + // State change - update CPON with new state + Store(Local3, Index(CPON, Local0)) + // Do CPU notify + If (LEqual(Local3, 1)) { + NTFY(Local0, 1) + } Else { + NTFY(Local0, 3) + } + } + Increment(Local0) + } + Return(One) + } + } + Scope (\_GPE) { Name(_HID, "ACPI0006") @@ -701,7 +773,8 @@ DefinitionBlock ( } Method(_L02) { - Return(0x01) + // CPU hotplug event + Return(\_SB.PRSC()) } Method(_L03) { Return(0x01) diff --git a/src/acpi.c b/src/acpi.c index 0559443..082ef73 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -406,16 +406,56 @@ build_madt(void) return madt; } +// Encode a hex value +static inline char getHex(u32 val) { + val &= 0x0f; + return (val <= 9) ? ('0' + val) : ('A' + val - 10); +} + +// Encode a length in an SSDT. +static u8 * +encodeLen(u8 *ssdt_ptr, int length, int bytes) +{ + if (bytes <= 1) { + *ssdt_ptr = length & 0x3f; + return ssdt_ptr+1; + } + ssdt_ptr[0] = (((bytes-1) & 0x3) << 6) | (length & 0x0f); + ssdt_ptr[1] = ((length >> 4) & 0xff); + ssdt_ptr[2] = ((length >> 12) & 0xff); + ssdt_ptr[3] = ((length >> 20) & 0xff); + return ssdt_ptr + bytes; +} + +// AML Processor() object. See src/ssdt-proc.dsl for info. +static unsigned char ssdt_proc[] = { + 0x5b,0x83,0x43,0x05,0x43,0x50,0x41,0x41, + 0xaa,0x10,0xb0,0x00,0x00,0x06,0x08,0x49, + 0x44,0x5f,0x5f,0x0a,0xaa,0x08,0x5f,0x48, + 0x49,0x44,0x0d,0x41,0x43,0x50,0x49,0x30, + 0x30,0x30,0x37,0x00,0x14,0x0f,0x5f,0x4d, + 0x41,0x54,0x00,0xa4,0x43,0x50,0x4d,0x41, + 0x49,0x44,0x5f,0x5f,0x14,0x0f,0x5f,0x53, + 0x54,0x41,0x00,0xa4,0x43,0x50,0x53,0x54, + 0x49,0x44,0x5f,0x5f,0x14,0x10,0x5f,0x45, + 0x4a,0x30,0x01,0xa4,0x43,0x50,0x45,0x4a, + 0x49,0x44,0x5f,0x5f,0x68 +}; +#define SD_OFFSET_CPUHEX 6 +#define SD_OFFSET_CPUID1 8 +#define SD_OFFSET_CPUID2 20 + #define SSDT_SIGNATURE 0x54445353 // SSDT static void* build_ssdt(void) { int acpi_cpus = MaxCountCPUs > 0xff ? 0xff : MaxCountCPUs; - // calculate the length of processor block and scope block - // excluding PkgLength - int cpu_length = 13 * acpi_cpus + 4; - - int length = sizeof(struct acpi_table_header) + 3 + cpu_length; + // length = ssdt header + ScopeOp + procs + CPUS package + CPON package + int length = (sizeof(struct acpi_table_header) + + (1+3+4) + + (acpi_cpus * sizeof(ssdt_proc)) + + (1+2+5+(12*acpi_cpus)) + + (1+4+1+2+1+(1*acpi_cpus))); u8 *ssdt = malloc_high(length); if (! ssdt) { warn_noalloc(); @@ -423,47 +463,66 @@ build_ssdt(void) } u8 *ssdt_ptr = ssdt; - ssdt_ptr[9] = 0; // checksum; ssdt_ptr += sizeof(struct acpi_table_header); // build processor scope header *(ssdt_ptr++) = 0x10; // ScopeOp - if (cpu_length <= 0x3e) { - /* Handle 1-4 CPUs with one byte encoding */ - *(ssdt_ptr++) = cpu_length + 1; - } else { - /* Handle 5-314 CPUs with two byte encoding */ - *(ssdt_ptr++) = 0x40 | ((cpu_length + 2) & 0xf); - *(ssdt_ptr++) = (cpu_length + 2) >> 4; - } + ssdt_ptr = encodeLen(ssdt_ptr, length-1, 3); *(ssdt_ptr++) = '_'; // Name - *(ssdt_ptr++) = 'P'; - *(ssdt_ptr++) = 'R'; + *(ssdt_ptr++) = 'S'; + *(ssdt_ptr++) = 'B'; *(ssdt_ptr++) = '_'; - // build object for each processor + // build Processor object for each processor int i; for (i=0; i> 4) < 0xa ? (i >> 4) + '0' : (i >> 4) + 'A' - 0xa; - else - *(ssdt_ptr++) = 'U'; - *(ssdt_ptr++) = (i & 0xf) < 0xa ? (i & 0xf) + '0' : (i & 0xf) + 'A' - 0xa; + memcpy(ssdt_ptr, ssdt_proc, sizeof(ssdt_proc)); + ssdt_ptr[SD_OFFSET_CPUHEX] = getHex(i >> 4); + ssdt_ptr[SD_OFFSET_CPUHEX+1] = getHex(i); + ssdt_ptr[SD_OFFSET_CPUID1] = i; + ssdt_ptr[SD_OFFSET_CPUID2] = i; + ssdt_ptr += sizeof(ssdt_proc); + } + + // build "Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}" + *(ssdt_ptr++) = 0x14; // MethodOp + ssdt_ptr = encodeLen(ssdt_ptr, 2+5+(12*acpi_cpus), 2); + *(ssdt_ptr++) = 'N'; + *(ssdt_ptr++) = 'T'; + *(ssdt_ptr++) = 'F'; + *(ssdt_ptr++) = 'Y'; + *(ssdt_ptr++) = 0x02; + for (i=0; i> 4); + *(ssdt_ptr++) = getHex(i); + *(ssdt_ptr++) = 0x69; // Arg1Op } + // build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" + *(ssdt_ptr++) = 0x08; // NameOp + *(ssdt_ptr++) = 'C'; + *(ssdt_ptr++) = 'P'; + *(ssdt_ptr++) = 'O'; + *(ssdt_ptr++) = 'N'; + *(ssdt_ptr++) = 0x12; // PackageOp + ssdt_ptr = encodeLen(ssdt_ptr, 2+1+(1*acpi_cpus), 2); + *(ssdt_ptr++) = acpi_cpus; + for (i=0; i out/ssdt-proc.dsl.i + * iasl -ta -p out/ssdt-proc out/ssdt-proc.dsl.i + * tail -c +37 < out/ssdt-proc.aml | hexdump -e '" " 8/1 "0x%02x," "\n"' + * and then cut-and-paste the output into the src/acpi.c ssdt_proc[] + * array. + * + * In addition to the aml code generated from this file, the + * src/acpi.c file creates a NTFY method with an entry for each cpu: + * Method(NTFY, 2) { + * If (LEqual(Arg0, 0x00)) { Notify(CP00, Arg1) } + * If (LEqual(Arg0, 0x01)) { Notify(CP01, Arg1) } + * ... + * } + * and a CPON array with the list of active and inactive cpus: + * Name(CPON, Package() { One, One, ..., Zero, Zero, ... }) + */ +DefinitionBlock ("ssdt-proc.aml", "SSDT", 0x01, "BXPC", "BXSSDT", 0x1) +/* V------------------ DO NOT EDIT ------------------V */ +{ + Processor (CPAA, 0xAA, 0x0000b010, 0x06) { + Name (ID, 0xAA) +/* ^------------------ DO NOT EDIT ------------------^ + * + * The src/acpi.c code requires the above layout so that it can update + * CPAA and 0xAA with the appropriate CPU id (see SD_OFFSET_CPUHEX, + * CPUID1, CPUID2). Don't change the above without also updating the + * C code. + */ + Name (_HID, "ACPI0007") + External(CPMA, MethodObj) + External(CPST, MethodObj) + External(CPEJ, MethodObj) + Method(_MAT, 0) { + Return(CPMA(ID)) + } + Method (_STA, 0) { + Return(CPST(ID)) + } + Method (_EJ0, 1, NotSerialized) { + Return(CPEJ(ID, Arg0)) + } + } +}