From patchwork Mon Sep 14 12:52:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wanpeng Li X-Patchwork-Id: 7175621 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 64FBBBEEC1 for ; Mon, 14 Sep 2015 12:52:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8C96820688 for ; Mon, 14 Sep 2015 12:52:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 89653205EC for ; Mon, 14 Sep 2015 12:52:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753649AbbINMwh (ORCPT ); Mon, 14 Sep 2015 08:52:37 -0400 Received: from blu004-omc1s38.hotmail.com ([65.55.116.49]:64664 "EHLO BLU004-OMC1S38.hotmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751300AbbINMwg (ORCPT ); Mon, 14 Sep 2015 08:52:36 -0400 Received: from BLU436-SMTP172 ([65.55.116.7]) by BLU004-OMC1S38.hotmail.com over TLS secured channel with Microsoft SMTPSVC(7.5.7601.23008); Mon, 14 Sep 2015 05:52:35 -0700 X-TMN: [ZqtQjzI/dvlQc87/gCSYOrI5OHNM8OOy] X-Originating-Email: [wanpeng.li@hotmail.com] Message-ID: From: Wanpeng Li To: Paolo Bonzini CC: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Wanpeng Li Subject: [PATCH] KVM: nVMX: nested VPID emulation Date: Mon, 14 Sep 2015 20:52:23 +0800 X-Mailer: git-send-email 1.9.1 X-OriginalArrivalTime: 14 Sep 2015 12:52:33.0923 (UTC) FILETIME=[3990D530:01D0EEEC] MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP VPID is used to tag address space and avoid a TLB flush. Currently L0 use the same VPID to run L1 and all its guests. KVM flushes VPID when switching between L1 and L2. This patch advertises VPID to the L1 hypervisor, then address space of L1 and L2 can be separately treated and avoid TLB flush when swithing between L1 and L2. This patch gets ~3x performance improvement for lmbench 8p/64k ctxsw. Signed-off-by: Wanpeng Li --- arch/x86/kvm/vmx.c | 39 ++++++++++++++++++++++++++++++++------- 1 file changed, 32 insertions(+), 7 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index da1590e..06bc31e 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -1157,6 +1157,11 @@ static inline bool nested_cpu_has_virt_x2apic_mode(struct vmcs12 *vmcs12) return nested_cpu_has2(vmcs12, SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE); } +static inline bool nested_cpu_has_vpid(struct vmcs12 *vmcs12) +{ + return nested_cpu_has2(vmcs12, SECONDARY_EXEC_ENABLE_VPID); +} + static inline bool nested_cpu_has_apic_reg_virt(struct vmcs12 *vmcs12) { return nested_cpu_has2(vmcs12, SECONDARY_EXEC_APIC_REGISTER_VIRT); @@ -2471,6 +2476,7 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx) SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES | SECONDARY_EXEC_RDTSCP | SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE | + SECONDARY_EXEC_ENABLE_VPID | SECONDARY_EXEC_APIC_REGISTER_VIRT | SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | SECONDARY_EXEC_WBINVD_EXITING | @@ -4160,7 +4166,7 @@ static void allocate_vpid(struct vcpu_vmx *vmx) int vpid; vmx->vpid = 0; - if (!enable_vpid) + if (!enable_vpid || is_guest_mode(&vmx->vcpu)) return; spin_lock(&vmx_vpid_lock); vpid = find_first_zero_bit(vmx_vpid_bitmap, VMX_NR_VPIDS); @@ -6738,6 +6744,14 @@ static int handle_vmclear(struct kvm_vcpu *vcpu) } vmcs12 = kmap(page); vmcs12->launch_state = 0; + if (enable_vpid) { + if (nested_cpu_has_vpid(vmcs12)) { + spin_lock(&vmx_vpid_lock); + if (vmcs12->virtual_processor_id != 0) + __clear_bit(vmcs12->virtual_processor_id, vmx_vpid_bitmap); + spin_unlock(&vmx_vpid_lock); + } + } kunmap(page); nested_release_page(page); @@ -9189,6 +9203,7 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12) { struct vcpu_vmx *vmx = to_vmx(vcpu); u32 exec_control; + int vpid; vmcs_write16(GUEST_ES_SELECTOR, vmcs12->guest_es_selector); vmcs_write16(GUEST_CS_SELECTOR, vmcs12->guest_cs_selector); @@ -9438,13 +9453,21 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12) else vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset); + if (enable_vpid) { - /* - * Trivially support vpid by letting L2s share their parent - * L1's vpid. TODO: move to a more elaborate solution, giving - * each L2 its own vpid and exposing the vpid feature to L1. - */ - vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid); + if (nested_cpu_has_vpid(vmcs12)) { + if (vmcs12->virtual_processor_id == 0) { + spin_lock(&vmx_vpid_lock); + vpid = find_first_zero_bit(vmx_vpid_bitmap, VMX_NR_VPIDS); + if (vpid < VMX_NR_VPIDS) + __set_bit(vpid, vmx_vpid_bitmap); + spin_unlock(&vmx_vpid_lock); + vmcs_write16(VIRTUAL_PROCESSOR_ID, vpid); + } else + vmcs_write16(VIRTUAL_PROCESSOR_ID, vmcs12->virtual_processor_id); + } else + vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid); + vmx_flush_tlb(vcpu); } @@ -9973,6 +9996,8 @@ static void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12, vmcs12_save_pending_event(vcpu, vmcs12); } + if (nested_cpu_has_vpid(vmcs12)) + vmcs12->virtual_processor_id = vmcs_read16(VIRTUAL_PROCESSOR_ID); /* * Drop what we picked up for L2 via vmx_complete_interrupts. It is * preserved above and would only end up incorrectly in L1.