From patchwork Fri Oct 6 16:41:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reinette Chatre X-Patchwork-Id: 13411748 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90275E81E1A for ; Fri, 6 Oct 2023 16:41:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233075AbjJFQls (ORCPT ); Fri, 6 Oct 2023 12:41:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233010AbjJFQlh (ORCPT ); Fri, 6 Oct 2023 12:41:37 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F1ADD6; Fri, 6 Oct 2023 09:41:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696610491; x=1728146491; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=P/uKNjSzEvnfr6wJTd3jHZzNTA5QOBXyphL09w2vknw=; b=Y/TNSsamMa1qCvgNwb7aeYLQSvKYT5Q7OJHzqcQWUBAkH8A8gpBWRyGA v6EkRb5ob0WAMGachB8qbn/D1YpRItjrXQj7xCq1NmdZfG2/MLSW77PxR pkbORrYjR1JLL6yqqj9N42jTdDhothCvfm1GpAWWc4m7hdQYoYuoHP86D P5y5w9KKxKQVrOOVRcGc7lFDw1Ar0hE0ucJzPu890fdoI2/MTWWoZc1H3 L6QEyYL/qeiGS9n7XMnxcXz9kVrAn82epfYCAwU6qOcnAgIPL5Nkut5bF dVwWQqKtlj/SJ0aDHQiyKsIxHu4DmvdX6UinzbSAHTuKhSPNyr1tT+r/s w==; X-IronPort-AV: E=McAfee;i="6600,9927,10855"; a="364063221" X-IronPort-AV: E=Sophos;i="6.03,204,1694761200"; d="scan'208";a="364063221" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Oct 2023 09:41:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10855"; a="842892878" X-IronPort-AV: E=Sophos;i="6.03,204,1694761200"; d="scan'208";a="842892878" Received: from rchatre-ws.ostc.intel.com ([10.54.69.144]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Oct 2023 09:41:26 -0700 From: Reinette Chatre To: jgg@nvidia.com, yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com, alex.williamson@redhat.com Cc: kvm@vger.kernel.org, dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com, fenghua.yu@intel.com, tom.zanussi@linux.intel.com, reinette.chatre@intel.com, linux-kernel@vger.kernel.org, patches@lists.linux.dev Subject: [RFC PATCH V2 13/18] vfio/pci: Make vfio_pci_set_irqs_ioctl() available Date: Fri, 6 Oct 2023 09:41:08 -0700 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org vfio_pci_set_irqs_ioctl() is now a generic entrypoint that can be configured to support different interrupt management backend. Not limited to PCI devices it can be exported for use by other virtual device drivers. Signed-off-by: Reinette Chatre --- drivers/vfio/pci/vfio_pci_intrs.c | 1 + include/linux/vfio_pci_core.h | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index 0a741159368c..d04a4477c201 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -909,3 +909,4 @@ int vfio_pci_set_irqs_ioctl(struct vfio_pci_intr_ctx *intr_ctx, uint32_t flags, mutex_unlock(&intr_ctx->igate); return ret; } +EXPORT_SYMBOL_GPL(vfio_pci_set_irqs_ioctl); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 893a36b5d163..1dd55d98dce9 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -158,6 +158,9 @@ long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd, void vfio_pci_init_intr_ctx(struct vfio_pci_core_device *vdev, struct vfio_pci_intr_ctx *intr_ctx); void vfio_pci_release_intr_ctx(struct vfio_pci_intr_ctx *intr_ctx); +int vfio_pci_set_irqs_ioctl(struct vfio_pci_intr_ctx *intr_ctx, uint32_t flags, + unsigned int index, unsigned int start, + unsigned int count, void *data); int vfio_pci_core_ioctl_feature(struct vfio_device *device, u32 flags, void __user *arg, size_t argsz); ssize_t vfio_pci_core_read(struct vfio_device *core_vdev, char __user *buf,