From patchwork Mon Feb 26 08:26:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13571518 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 019CE7A72C; Mon, 26 Feb 2024 08:28:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708936131; cv=none; b=jZs5YVjrLPzsyqL3mJZNp9BrSuhsoI4bjEbjPsPqFpvE+QxhYZoOTGAEMAe7LIDI09p85l/mFB+2NCWGuHAbeKhFUgKoTWhOlXNZHFn4wuOvjJG+a+MMwE5/7rEL4CycOLjIuX7jTYc3pAYVY/lfuRbl1xRmKOlDFRGXtgvImUY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708936131; c=relaxed/simple; bh=/sAXojEGYW4Sd48ndXBIWs56QmQk33LvAtJbkrrQS6g=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=bwe57A30LHvEt2mIK/A0ynflSQi8mX/a2sN9GCUD4l/eClN25tcWP7v0vezIBlILhvMDJxWfb9hK4NU0yzUiSqDkggOE7Do5G2Bd68/Ovun6DpwN2cGKyzaIScplhWYneius+/tvTWk57L+6lLQ/EPPEGD9gDhn/k2EkdjXbtCw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OvFjUD+U; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OvFjUD+U" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1708936130; x=1740472130; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/sAXojEGYW4Sd48ndXBIWs56QmQk33LvAtJbkrrQS6g=; b=OvFjUD+Ugm0OSh9HGuQA9xtoDIMeO1/BOx2s9SRj520IZaAzojl7+Syh AD2shgY0seNVkyCNMQqjwtlNFFYmM+ZdrA6tTYWsGiJkO3SVoDbxX40W3 lxJXoc8fgPeft5LsgUBd/Bfw2ooKx9t2qqdzb+Wcb+rS7D5tM0X/4xE3F iM8RVfVeEeJjD8AvVUF8kferLvVBZYf781qQtbvNGAZ9sEqC4BEhyPp4W OBUnlgeaTegLhAuhSKu5MRPxRUe17pb6DyNyS4wuJokqzfwAuFArk67nw 5oqxZXzmTuDdK45PKRr1Vm6K4ilG6iYWY1Y8SWa9GHVJpfLIAttr9Pyys Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10995"; a="3069551" X-IronPort-AV: E=Sophos;i="6.06,185,1705392000"; d="scan'208";a="3069551" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Feb 2024 00:28:49 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,185,1705392000"; d="scan'208";a="11272637" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Feb 2024 00:28:48 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , Kai Huang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [PATCH v19 090/130] KVM: x86: Assume timer IRQ was injected if APIC state is proteced Date: Mon, 26 Feb 2024 00:26:32 -0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Sean Christopherson If APIC state is protected, i.e. the vCPU is a TDX guest, assume a timer IRQ was injected when deciding whether or not to busy wait in the "timer advanced" path. The "real" vIRR is not readable/writable, so trying to query for a pending timer IRQ will return garbage. Note, TDX can scour the PIR if it wants to be more precise and skip the "wait" call entirely. Signed-off-by: Sean Christopherson Signed-off-by: Isaku Yamahata --- arch/x86/kvm/lapic.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index e8034f2f2dd1..8025c7f614e0 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1774,8 +1774,17 @@ static void apic_update_lvtt(struct kvm_lapic *apic) static bool lapic_timer_int_injected(struct kvm_vcpu *vcpu) { struct kvm_lapic *apic = vcpu->arch.apic; - u32 reg = kvm_lapic_get_reg(apic, APIC_LVTT); + u32 reg; + /* + * Assume a timer IRQ was "injected" if the APIC is protected. KVM's + * copy of the vIRR is bogus, it's the responsibility of the caller to + * precisely check whether or not a timer IRQ is pending. + */ + if (apic->guest_apic_protected) + return true; + + reg = kvm_lapic_get_reg(apic, APIC_LVTT); if (kvm_apic_hw_enabled(apic)) { int vec = reg & APIC_VECTOR_MASK; void *bitmap = apic->regs + APIC_ISR;