From patchwork Tue Aug 23 17:33:03 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 1089222 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7NHXTN2002141 for ; Tue, 23 Aug 2011 17:33:29 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755779Ab1HWRdZ (ORCPT ); Tue, 23 Aug 2011 13:33:25 -0400 Received: from goliath.siemens.de ([192.35.17.28]:29405 "EHLO goliath.siemens.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755692Ab1HWRdL (ORCPT ); Tue, 23 Aug 2011 13:33:11 -0400 Received: from mail1.siemens.de (localhost [127.0.0.1]) by goliath.siemens.de (8.13.6/8.13.6) with ESMTP id p7NHX62s026113; Tue, 23 Aug 2011 19:33:06 +0200 Received: from mchn199C.mchp.siemens.de ([139.25.109.49]) by mail1.siemens.de (8.13.6/8.13.6) with ESMTP id p7NHX4tR016941; Tue, 23 Aug 2011 19:33:06 +0200 From: Jan Kiszka To: Avi Kivity , Marcelo Tosatti Cc: kvm@vger.kernel.org, "Michael S. Tsirkin" , Alex Williamson Subject: [PATCH v3 7/7] qemu-kvm: Resolve PCI upstream diffs Date: Tue, 23 Aug 2011 19:33:03 +0200 Message-Id: X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Tue, 23 Aug 2011 17:33:30 +0000 (UTC) Device assignment no longer peeks into config_map, so we can drop all the related changes and sync the PCI core with upstream. Signed-off-by: Jan Kiszka --- hw/pci.c | 29 +++++++++++++++-------------- hw/pci.h | 7 +++++-- 2 files changed, 20 insertions(+), 16 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 5c87a62..0225888 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -806,7 +806,7 @@ static void pci_config_alloc(PCIDevice *pci_dev) pci_dev->cmask = g_malloc0(config_size); pci_dev->wmask = g_malloc0(config_size); pci_dev->w1cmask = g_malloc0(config_size); - pci_dev->config_map = g_malloc0(config_size); + pci_dev->used = g_malloc0(config_size); } static void pci_config_free(PCIDevice *pci_dev) @@ -815,7 +815,7 @@ static void pci_config_free(PCIDevice *pci_dev) g_free(pci_dev->cmask); g_free(pci_dev->wmask); g_free(pci_dev->w1cmask); - g_free(pci_dev->config_map); + g_free(pci_dev->used); } /* -1 for devfn means auto assign */ @@ -846,8 +846,6 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus, pci_dev->irq_state = 0; pci_config_alloc(pci_dev); - memset(pci_dev->config_map, 0xff, PCI_CONFIG_HEADER_SIZE); - pci_config_set_vendor_id(pci_dev->config, info->vendor_id); pci_config_set_device_id(pci_dev->config, info->device_id); pci_config_set_revision(pci_dev->config, info->revision); @@ -1887,7 +1885,7 @@ static int pci_find_space(PCIDevice *pdev, uint8_t size) int offset = PCI_CONFIG_HEADER_SIZE; int i; for (i = PCI_CONFIG_HEADER_SIZE; i < config_size; ++i) - if (pdev->config_map[i]) + if (pdev->used[i]) offset = i + 1; else if (i - offset + 1 == size) return offset; @@ -2062,13 +2060,13 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, int i; for (i = offset; i < offset + size; i++) { - if (pdev->config_map[i]) { + if (pdev->used[i]) { fprintf(stderr, "ERROR: %04x:%02x:%02x.%x " "Attempt to add PCI capability %x at offset " "%x overlaps existing capability %x at offset %x\n", pci_find_domain(pdev->bus), pci_bus_num(pdev->bus), PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), - cap_id, offset, pdev->config_map[i], i); + cap_id, offset, pdev->used[i], i); return -EINVAL; } } @@ -2078,14 +2076,12 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, config[PCI_CAP_LIST_ID] = cap_id; config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST]; pdev->config[PCI_CAPABILITY_LIST] = offset; - memset(pdev->config_map + offset, cap_id, size); + pdev->config[PCI_STATUS] |= PCI_STATUS_CAP_LIST; + memset(pdev->used + offset, 0xFF, size); /* Make capability read-only by default */ memset(pdev->wmask + offset, 0, size); /* Check capability by default */ memset(pdev->cmask + offset, 0xFF, size); - - pdev->config[PCI_STATUS] |= PCI_STATUS_CAP_LIST; - return offset; } @@ -2101,11 +2097,16 @@ void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size) memset(pdev->w1cmask + offset, 0, size); /* Clear cmask as device-specific registers can't be checked */ memset(pdev->cmask + offset, 0, size); - memset(pdev->config_map + offset, 0, size); + memset(pdev->used + offset, 0, size); - if (!pdev->config[PCI_CAPABILITY_LIST]) { + if (!pdev->config[PCI_CAPABILITY_LIST]) pdev->config[PCI_STATUS] &= ~PCI_STATUS_CAP_LIST; - } +} + +/* Reserve space for capability at a known offset (to call after load). */ +void pci_reserve_capability(PCIDevice *pdev, uint8_t offset, uint8_t size) +{ + memset(pdev->used + offset, 0xff, size); } uint8_t pci_find_capability(PCIDevice *pdev, uint8_t cap_id) diff --git a/hw/pci.h b/hw/pci.h index 071a044..70fcd9c 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -147,8 +147,8 @@ struct PCIDevice { /* Used to implement RW1C(Write 1 to Clear) bytes */ uint8_t *w1cmask; - /* Used to allocate config space and track capabilities. */ - uint8_t *config_map; + /* Used to allocate config space for capabilities. */ + uint8_t *used; /* the following fields are read only */ PCIBus *bus; @@ -230,8 +230,11 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size); +void pci_reserve_capability(PCIDevice *pci_dev, uint8_t offset, uint8_t size); + uint8_t pci_find_capability(PCIDevice *pci_dev, uint8_t cap_id); + uint32_t pci_default_read_config(PCIDevice *d, uint32_t address, int len); void pci_default_write_config(PCIDevice *d,