From patchwork Tue Nov 7 14:55:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13448951 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC2033714F for ; Tue, 7 Nov 2023 14:58:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="I78eB7cF" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07C4E12A; Tue, 7 Nov 2023 06:58:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1699369087; x=1730905087; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=h1V0qYYKP2/tUAE9YdkXKIZ174fEucLHCuXCCkPAD3s=; b=I78eB7cFjxZNyHr16oYbZ1TW4F3nx/L4wPGTfht4GGJ7IUVBOGx/nBIR shZ2xXNIAkjjWHBtU0jgkkuKDftTzwe6LYAkmQ9PfhNuLY0mk1pfQL3z5 NIKckJ70eVeI+xQBtuGoy/05hzhYjQPGNg4pKA6W33w+GRBAQif8EWJ8p C+RJYc3+AcCDg5Hadx6v3+JDYIkYwFQ1UsjPG+ewKhUh2gvoMmgWEqX2k 0RyWL2q7Q98gW95QDr2F6q+VPRtEcJmQS4QWPlNhiF7UJC3Y84KAVJUyr iJ7g2XJl2DKCURFLFVpPo9ACGbRA7r5pcwgFH+y+nOpKFONlHPkWgoQNP Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10887"; a="374555917" X-IronPort-AV: E=Sophos;i="6.03,284,1694761200"; d="scan'208";a="374555917" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Nov 2023 06:58:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.03,284,1694761200"; d="scan'208";a="10444268" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Nov 2023 06:58:06 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack , Kai Huang , Zhi Wang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [PATCH v17 028/116] KVM: x86/mmu: introduce config for PRIVATE KVM MMU Date: Tue, 7 Nov 2023 06:55:54 -0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Isaku Yamahata To keep the case of non TDX intact, introduce a new config option for private KVM MMU support. At the moment, this is synonym for CONFIG_INTEL_TDX_HOST && CONFIG_KVM_INTEL. The config makes it clear that the config is only for x86 KVM MMU. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig index 54377bdb6443..b0f103641547 100644 --- a/arch/x86/kvm/Kconfig +++ b/arch/x86/kvm/Kconfig @@ -179,4 +179,8 @@ config KVM_MAX_NR_VCPUS the memory footprint of each KVM guest, regardless of how many vCPUs are created for a given VM. +config KVM_MMU_PRIVATE + def_bool y + depends on INTEL_TDX_HOST && KVM_INTEL + endif # VIRTUALIZATION