From patchwork Sat Feb 9 00:47:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 10803953 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4456414E1 for ; Sat, 9 Feb 2019 00:47:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C2922E787 for ; Sat, 9 Feb 2019 00:47:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1B02A2EB2E; Sat, 9 Feb 2019 00:47:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 96B7E2E787 for ; Sat, 9 Feb 2019 00:47:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726565AbfBIAr2 (ORCPT ); Fri, 8 Feb 2019 19:47:28 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:58566 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726222AbfBIAr2 (ORCPT ); Fri, 8 Feb 2019 19:47:28 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0A612A78; Fri, 8 Feb 2019 16:47:28 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 681083F719; Fri, 8 Feb 2019 16:47:27 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, devel@acpica.org, catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, robert.moore@intel.com, erik.schmauss@intel.com, rafael.j.wysocki@intel.com, lenb@kernel.org, Jeremy Linton Subject: [RFC 0/3] arm64: SPE ACPI enablement Date: Fri, 8 Feb 2019 18:47:15 -0600 Message-Id: <20190209004718.3292087-1-jeremy.linton@arm.com> X-Mailer: git-send-email 2.17.2 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch series enables the Arm Statistical Profiling Extension (SPE) on ACPI platforms. This is possible because ACPI 6.3 uses a previously reserved field in the MADT to store the SPE interrupt number, similarly to how the normal PMU is described. If a consistent valid interrupt exists across all the cores in the system, a platform device is registered. That then triggers the SPE module, which runs as normal. Jeremy Linton (3): ACPICA: ACPI 6.3: Add MADT/GICC/SPE extension. arm_pmu: acpi: spe: Add initial MADT/SPE probing perf: arm_spe: Enable ACPI/Platform automatic module loading arch/arm64/include/asm/acpi.h | 4 +++ drivers/perf/arm_pmu_acpi.c | 67 +++++++++++++++++++++++++++++++++++ drivers/perf/arm_spe_pmu.c | 11 ++++-- include/acpi/actbl2.h | 5 +-- 4 files changed, 83 insertions(+), 4 deletions(-)